参数资料
型号: PIC16LC642T-04/SO
厂商: Microchip Technology
文件页数: 113/125页
文件大小: 0K
描述: IC MCU OTP 4KX14 COMP 28SOIC
标准包装: 1,600
系列: PIC® 16C
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
外围设备: 欠压检测/复位,LED,POR,WDT
输入/输出数: 22
程序存储器容量: 7KB(4K x 14)
程序存储器类型: OTP
RAM 容量: 176 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 6 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
Micrel, Inc.
KSZ8862-16/32MQL
April 2007
88
M9999-040407-3.0
Bank 47 PHY2 Special Control/Status Register (0x06): P2PHYCTRL
This register contains the control and status information of PHY2.
Bit
Default
R/W
Description
Bit is same as:
15-6
0x000
RO
Reserved
5
0
RO
Polarity reverse (polrvs)
1 = polarity is reversed.
0 = polarity is not reversed.
Bank 51 0x04 bit 13
4
0
RO
MDIX Status (mdix_st)
1 = MDI
0 = MDI-X
Bank 51 0x04 bit 7
3
0
RW
Force Link (force_lnk)
1 = force link pass.
0 = normal operation.
Bank 51 0x00 bit 11
2
1
RW
Power Saving (pwrsave)
1 = disable power saving.
0 = enable power saving.
Bank 51 0x00 bit 10
1
0
RW
Remote (Near-End) Loopback (rlb)
1 = perform remote loopback at Port 2's PHY(RXP2/RXM2 ->
TXP2/TXM2. see Figure 15)
0 = normal operation
Bank 51 0x00 bit 9
0
RW
Reserved
Bank 48 Port 1 Control Register 1 (0x00): P1CR1
This register contains the global per port control for the switch function.
Bit
Default
R/W
Description
15-8
0x00
RO
Reserved
7
0
RW
Broadcast Storm Protection Enable
1 = enable broadcast storm protection for ingress packets on the port.
0 = disable broadcast storm protection.
6
0
RW
Diffserv Priority Classification Enable
1= enable DiffServ priority classification for ingress packets on the port.
0 = disable DiffServ function.
5
0
RW
802.1p Priority Classification Enable
1= enable 802.1p priority classification for ingress packets on the port.
0 = disable 802.1p.
4-3
0x0
RW
Port-Based Priority Classification
00 - ingress packets on port are classified as priority 0 queue if “DiffServ” or “802.1p” classification
is not enabled or fails to classify.
01 - ingress packets on port are classified as priority 1 queue if “DiffServ” or “802.1p” classification
is not enabled or fails to classify.
10 - ingress packets on port are classified as priority 2 queue if “DiffServ” or “802.1p” classification
is not enabled or fails to classify.
11 - ingress packets on port are classified as priority 3 queue if “Diffserv” or “802.1p” classification is
not enabled or fails to classify.
Note: “DiffServ”, “802.1p” and port priority can be enabled at the same time. The OR’ed result of
802.1p and DSCP overwrites the port priority.
2
0
RW
Tag Insertion
1 = when packets are output on the port, the switch adds 802.1p/q tags to packets without 802.1p/q
tags when received. The switch will not add tags to packets already tagged. The tag inserted is the
ingress port’s “port VID”.
0 = disable tag insertion.
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