参数资料
型号: PIC16LC711-04E/P
厂商: Microchip Technology
文件页数: 17/177页
文件大小: 0K
描述: IC MCU OTP 1KX14 A/D 18DIP
产品培训模块: Asynchronous Stimulus
标准包装: 25
系列: PIC® 16C
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
外围设备: 欠压检测/复位,PWM,WDT
输入/输出数: 13
程序存储器容量: 1.75KB(1K x 14)
程序存储器类型: OTP
RAM 容量: 68 x 8
电压 - 电源 (Vcc/Vdd): 2.5 V ~ 6 V
数据转换器: A/D 4x8b
振荡器型: 外部
工作温度: -40°C ~ 125°C
封装/外壳: 18-DIP(0.300",7.62mm)
包装: 管件
113
7593L–AVR–09/12
AT90USB64/128
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
14.8.5
OCR0B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
14.8.6
TIMSK0 – Timer/Counter Interrupt Mask Register
Bits 7..3, 0 – Res: Reserved bits
These bits are reserved bits and will always read as zero.
Bit 2 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is executed if
a Compare Match in Timer/Counter occurs, that is, when the OCF0B bit is set in the
Timer/Counter Interrupt Flag Register – TIFR0.
Bit 1 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable
When the OCIE0A bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Compare Match A interrupt is enabled. The corresponding interrupt is executed
if a Compare Match in Timer/Counter0 occurs, that is, when the OCF0A bit is set in the
Timer/Counter 0 Interrupt Flag Register – TIFR0.
Bit 0 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if an
overflow in Timer/Counter0 occurs, that is, when the TOV0 bit is set in the Timer/Counter 0 Inter-
rupt Flag Register – TIFR0.
14.8.7
TIFR0 – Timer/Counter 0 Interrupt Flag Register
Bits 7..3, 0 – Res: Reserved bits
These bits are reserved bits in the Atmel AT90USB64/128 and will always read as zero.
Bit
7
65
43
21
0
OCR0B[7:0]
OCR0B
Read/write
R/W
Initial value
00
Bit
7
6
543
2
1
0
OCIE0B
OCIE0A
TOIE0
TIMSK0
Read/write
R
R/W
Initial value
0
Bit
7654
32
10
––––
–OCF0B
OCF0A
TOV0
TIFR0
Read/write
RRRR
RR/W
R/W
Initial value
0000
00
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