参数资料
型号: PIC16LC923-04/L
厂商: Microchip Technology
文件页数: 113/115页
文件大小: 0K
描述: IC MCU OTP 4KX14 LCD DVR 68PLCC
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 19
系列: PIC® 16C
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
连通性: I²C,SPI
外围设备: LCD,POR,PWM,WDT
输入/输出数: 25
程序存储器容量: 7KB(4K x 14)
程序存储器类型: OTP
RAM 容量: 176 x 8
电压 - 电源 (Vcc/Vdd): 2.5 V ~ 6 V
振荡器型: 外部
工作温度: 0°C ~ 70°C
封装/外壳: 68-LCC(J 形引线)
包装: 管件
Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
97
Revision 1.6
Table 21. Format of “All Port Dropped Packet” MIB Counters
Bit
Name
R/W
Description
Default
30-16
Reserved
N/A
Reserved
N/A
15-0
Counter Value
RO
Counter Value
0
“All Port Dropped Packet” MIB counters are read using indirect memory access. The address offsets for these counters
are shown in Table 22.
Table 22. “All Port Dropped Packet” MIB Counters
Offset
Counter Name
Description
0x100
Port1 TX Drop Packets
TX packets dropped due to lack of resources
0x101
Port2 TX Drop Packets
TX packets dropped due to lack of resources
0x102
Port3 TX Drop Packets
TX packets dropped due to lack of resources
0x103
Port1 RX Drop Packets
RX packets dropped due to lack of resources
0x104
Port2 RX Drop Packets
RX packets dropped due to lack of resources
0x105
Port3 RX Drop Packets
RX packets dropped due to lack of resources
Examples:
1.
MIB Counter Read (Read port 1 “Rx64Octets” Counter)
Write to reg. 121 (0x79) with 0x1c
// Read MIB counters selected
Write to reg. 122 (0x7A) with 0x0e
// Trigger the read operation
Then,
Read reg. 128 (0x80), overflow bit [31]
// If bit 31 = 1, there was a counter overflow valid
bit [30] // If bit 30 = 0, restart (reread) from this register counter bits [29:24]
Read reg. 129 (0x81), counter bits [23:16]
Read reg. 130 (0x82), counter bits [15:8]
Read reg. 131 (0x83), counter bits [7:0]
2.
MIB Counter Read (Read port 2 “Rx64Octets” Counter)
Write to reg. 121 (0x79) with 0x1c
// Read MIB counter selected
Write to reg. 122 (0x7A) with 0x2e
// Trigger the read operation
Then,
Read reg. 128 (0x80), overflow bit [31]
// If bit 31 = 1, there was a counter overflow valid
bit [30] // If bit 30 = 0, restart (reread) from this register counter bits [29:24]
Read reg. 129 (0x81), counter bits [23:16]
Read reg. 130 (0x82), counter bits [15:8]
Read reg. 131 (0x83), counter bits [7:0]
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