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型号： PIC16LF72T-I/SO
厂商： Microchip Technology
文件页数： 98/136页
文件大小： 0K
描述： IC MCU FLASH 2KX14 LV AD 28-SOIC
产品培训模块： Asynchronous Stimulus
标准包装： 1,600
系列： PIC® 16F
核心处理器： PIC
芯体尺寸： 8-位
速度： 20MHz
连通性： I²C，SPI
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 22
程序存储器容量： 3.5KB（2K x 14）
程序存储器类型： 闪存
RAM 容量： 128 x 8
电压 - 电源 (Vcc/Vdd)： 2 V ~ 5.5 V
数据转换器： A/D 5x8b
振荡器型： 外部
工作温度： -40°C ~ 85°C
封装/外壳： 28-SOIC（0.295"，7.50mm 宽）
包装： 带卷 (TR)
PIC16F72
DS39597C-page 62
2007 Microchip Technology Inc.
TABLE 11-2:
CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR (FOR
DESIGN GUIDANCE ONLY)
11.2.3
RC OSCILLATOR
For timing insensitive applications, the “RC” device
option offers additional cost savings. The RC oscillator
frequency is a function of the supply voltage, the resis-
tor (REXT) and capacitor (CEXT) values, and the operat-
ing temperature. In addition to this, the oscillator
frequency will vary from unit to unit due to normal pro-
cess parameter variation. Furthermore, the difference
in lead frame capacitance between package types will
also affect the oscillation frequency, especially for low
CEXT values. The user also needs to take into account
variation due to tolerance of external R and C com-
ponents used. Figure 11-3 shows how the R/C
combination is connected to the PIC16F72.
FIGURE 11-3:
RC OSCILLATOR MODE
11.3
RESET
The PIC16F72 differentiates between various kinds of
RESET:
Power-on Reset (POR)
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset (during normal operation)
WDT Wake-up (during SLEEP)
Brown-out Reset (BOR)
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are reset to a
“RESET state” on Power-on Reset (POR), on the
MCLR and WDT Reset, on MCLR Reset during
SLEEP, and Brown-out Reset (BOR). They are not
affected by a WDT Wake-up, which is viewed as the
resumption of normal operation. The TO and PD bits
are set or cleared differently in different RESET situa-
tions, as indicated in Table 11-4. These bits are used in
software to determine the nature of the RESET. See
Table 11-6 for a full description of RESET states of all
registers.
A simplified block diagram of the on-chip RESET circuit
is shown in Figure 11-4.
Osc Type
Crystal
Freq
Typical Capacitor Values
Tested:
C1
C2
LP
32 kHz
33 pF
200 kHz
15 pF
XT
200 kHz
56 pF
1 MHz
15 pF
4 MHz
15 pF
HS
4 MHz
15 pF
8 MHz
15 pF
20 MHz
15 pF
Capacitor values are for design guidance only.
These capacitors were tested with the crystals listed
below for basic start-up and operation. These values
were not optimized.
Different capacitor values may be required to produce
acceptable oscillator operation. The user should test
the performance of the oscillator over the expected
VDD and temperature range for the application.
See the notes following this table for additional
information.
Note 1: Higher capacitance increases the stability
of oscillator, but also increases the
start-up time.
2: Since each resonator/crystal has its own
characteristics, the user should consult the
resonator/crystal manufacturer for appro-
priate values of external components.
3: Rs may be required in HS mode, as well
as XT mode, to avoid overdriving crystals
with low drive level specification.
4: Always verify oscillator performance over
the VDD and temperature range that is
expected for the application.
OSC2/CLKO
CEXT
REXT
PIC16F72
OSC1
FOSC/4
Internal
Clock
VDD
VSS
Recommended values:
3 k
Ω ≤ REXT ≤ 100 kΩ
CEXT > 20 pF
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