参数资料
型号: PIC16LF871-I/PT
厂商: Microchip Technology
文件页数: 12/143页
文件大小: 0K
描述: IC PIC MCU FLASH 2KX14 44TQFP
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 160
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
连通性: UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 33
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: 闪存
EEPROM 大小: 64 x 8
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 44-TQFP
包装: 托盘
产品目录页面: 639 (CN2011-ZH PDF)
2003 Microchip Technology Inc.
DS30569B-page 107
PIC16F870/871
DECFSZ
Decrement f, Skip if 0
Syntax:
[ label ] DECFSZ f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(f) - 1
→ (destination);
skip if result = 0
Status Affected:
None
Description:
The contents of register 'f' are
decremented. If 'd' is 0, the result
is placed in the W register. If 'd' is
1, the result is placed back in
register 'f'.
If the result is 1, the next instruc-
tion is executed. If the result is 0,
then a NOP is executed instead
making it a 2 TCY instruction.
GOTO
Unconditional Branch
Syntax:
[ label ]
GOTO k
Operands:
0
≤ k ≤ 2047
Operation:
k
→ PC<10:0>
PCLATH<4:3>
→ PC<12:11>
Status Affected:
None
Description:
GOTO
is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a
two-cycle instruction.
INCF
Increment f
Syntax:
[ label ]
INCF f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(f) + 1
→ (destination)
Status Affected:
Z
Description:
The contents of register 'f' are
incremented. If 'd' is 0, the result
is placed in the W register. If 'd' is
1, the result is placed back in
register 'f'.
INCFSZ
Increment f, Skip if 0
Syntax:
[ label ]
INCFSZ f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(f) + 1
→ (destination),
skip if result = 0
Status Affected:
None
Description:
The contents of register 'f' are
incremented. If 'd' is 0, the result is
placed in the W register. If 'd' is 1,
the result is placed back in
register 'f'.
If the result is 1, the next instruc-
tion is executed. If the result is 0,
a NOP is executed instead, making
it a 2 TCY instruction.
IORLW
Inclusive OR Literal with W
Syntax:
[ label ]
IORLW k
Operands:
0
≤ k ≤ 255
Operation:
(W) .OR. k
→ (W)
Status Affected:
Z
Description:
The contents of the W register are
OR’ed with the eight bit literal 'k'.
The result is placed in the W
register.
IORWF
Inclusive OR W with f
Syntax:
[ label ]
IORWF
f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(W) .OR. (f)
→ (destination)
Status Affected:
Z
Description:
Inclusive OR the W register with
register 'f'. If 'd' is 0 the result is
placed in the W register. If 'd' is 1
the result is placed back in
register 'f'.
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