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| 型号： | PIC17C44 |
| 元件分类： | 外设及接口 |
| 英文描述： | Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C |
| 中文描述： | 电可擦除可编程逻辑器件 |
| 文件页数： | 22/71页 |
| 文件大小： | 1173K |
| 代理商： | PIC17C44 |
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1996 Microchip Technology Inc.
DS30412C-page 29
PIC17C4X
6.0
MEMORY ORGANIZATION
There are two memory blocks in the PIC17C4X; pro-
gram memory and data memory. Each block has its
own bus, so that access to each block can occur during
the same oscillator cycle.
The data memory can further be broken down into Gen-
eral Purpose RAM and the Special Function Registers
(SFRs). The operation of the SFRs that control the
“core” are described here. The SFRs used to control
the peripheral modules are described in the section dis-
cussing each individual peripheral module.
6.1
Program Memory Organization
PIC17C4X devices have a 16-bit program counter
capable of addressing a 64K x 16 program memory
space. The reset vector is at 0000h and the interrupt
vectors are at 0008h, 0010h, 0018h, and 0020h
6.1.1
PROGRAM MEMORY OPERATION
The PIC17C4X can operate in one of four possible pro-
gram memory congurations. The conguration is
selected by two conguration bits. The possible modes
are:
Microprocessor
Microcontroller
Extended Microcontroller
Protected Microcontroller
The microcontroller and protected microcontroller
modes only allow internal execution. Any access
beyond the program memory reads unknown data.
The protected microcontroller mode also enables the
code protection feature.
The extended microcontroller mode accesses both the
internal program memory as well as external program
memory. Execution automatically switches between
internal and external memory. The 16-bits of address
allow a program memory range of 64K-words.
The microprocessor mode only accesses the external
program memory. The on-chip program memory is
ignored. The 16-bits of address allow a program mem-
ory range of 64K-words. Microprocessor mode is the
default mode of an unprogrammed device.
The different modes allow different access to the con-
guration bits, test memory, and boot ROM. Table 6-1
lists which modes can access which areas in memory.
Test Memory and Boot Memory are not required for
normal operation of the device. Care should be taken to
ensure that no unintended branches occur to these
areas.
FIGURE 6-1:
PROGRAM MEMORY MAP
AND STACK
PC<15:0>
Stack Level 1
Stack Level 16
Reset Vector
INT Pin Interrupt Vector
Timer0 Interrupt Vector
T0CKI Pin Interrupt Vector
Peripheral Interrupt Vector
FOSC0
FOSC1
WDTPS0
WDTPS1
PM0
Reserved
PM1
Reserved
Congur
ation
Memor
y
Space
User
Memor
y
Space
(1)
CALL, RETURN
RETFIE, RETLW
16
0000h
0008h
0010h
0020h
0021h
0018h
7FFh
FDFFh
FE00h
FE01h
FE02h
FE03h
FE04h
FE05h
FE06h
FE07h
FE0Fh
Test EPROM
Boot ROM
FE10h
FF5Fh
FF60h
FFFFh
FFFh
1FFFh
(PIC17C42,
(PIC17C43
(PIC17C44)
Reserved
PM2(2)
FE08h
PIC17CR42,
PIC17C42A)
PIC17CR43)
Note 1:
User memory space may be internal, external, or
both. The memory conguration depends on the
processor mode.
2:
This location is reserved on the PIC17C42.
FE0Eh
This document was created with FrameMaker404
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