参数资料
型号: PIC18F24J10-I/ML
厂商: Microchip Technology
文件页数: 42/80页
文件大小: 0K
描述: IC PIC MCU FLASH 8KX16 28QFN
产品培训模块: Asynchronous Stimulus
PIC18 J Series MCU Overview
标准包装: 61
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 40MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 21
程序存储器容量: 16KB(8K x 16)
程序存储器类型: 闪存
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 3.6 V
数据转换器: A/D 10x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-VQFN 裸露焊盘
包装: 管件
产品目录页面: 642 (CN2011-ZH PDF)
配用: AC164336-ND - MODULE SOCKET FOR PM3 28/44QFN
AC162074-ND - HEADER INTRFC MPLAB ICD2 44TQFP
AC162067-ND - HEADER INTRFC MPLAB ICD2 40/28P
PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 47
8.7
Time-out Sequence and Power-down
Status Bits (TO/PD)
and Figure 8-13) the time-out sequence is as follows:
First PWRT time-out is invoked after a POR has
expired. Then the OST is activated. The total time-out
will vary based on oscillator configuration and PWRTE
configuration bit status. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
TABLE 8-5
TIME-OUT IN VARIOUS
SITUATIONS
Since the time-outs occur from the POR reset pulse, if
MCLR is kept low long enough, the time-outs will
expire. Then bringing MCLR high, execution will begin
immediately (Figure 8-10). This is useful for testing
purposes or to synchronize more than one PIC16F8X
device when operating in parallel.
Table 8-6 shows the significance of the TO and PD bits.
Table 8-3 lists the reset conditions for some special
registers, while Table 8-4 lists the reset conditions for
all the registers.
TABLE 8-6
STATUS BITS AND THEIR
SIGNIFICANCE
8.8
Reset on Brown-Out
A brown-out is a condition where device power (VDD)
dips below its minimum value, but not to zero, and then
recovers. The device should be reset in the event of a
brown-out.
To reset a PIC16F8X device when a brown-out occurs,
external brown-out protection circuits may be built, as
FIGURE 8-14: BROWN-OUT PROTECTION
CIRCUIT 1
FIGURE 8-15: BROWN-OUT PROTECTION
CIRCUIT 2
Oscillator
Configuration
Power-up
Wake-up
from
SLEEP
PWRT
Enabled
PWRT
Disabled
XT, HS, LP
72 ms +
1024TOSC
RC
72 ms
——
TO
PD
Condition
11
Power-on Reset
0x
Illegal, TO is set on POR
x0
Illegal, PD is set on POR
01
WDT Reset (during normal operation)
00
WDT Wake-up
11
MCLR Reset during normal operation
10
MCLR Reset during SLEEP or interrupt
wake-up from SLEEP
This circuit will activate reset when VDD goes below
(Vz + 0.7V) where Vz = Zener voltage.
VDD
33k
10k
40k
VDD
MCLR
PIC16F8X
This brown-out circuit is less expensive, although less
accurate. Transistor Q1 turns off when VDD is below a
certain level such that:
VDD
R1
R1 + R2
= 0.7V
R2
40k
VDD
MCLR
PIC16F8X
R1
Q1
VDD
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