参数资料
型号: PIC18F4331T-I/ML
厂商: Microchip Technology
文件页数: 92/119页
文件大小: 0K
描述: IC MCU FLASH 4KX16 44QFN
标准包装: 1,600
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 40MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,LVD,电源控制 PWM,QEI,POR,PWM,WDT
输入/输出数: 36
程序存储器容量: 8KB(4K x 16)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 4.2 V ~ 5.5 V
数据转换器: A/D 9x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-VQFN 裸露焊盘
包装: 带卷 (TR)
配用: I3-DB18F4431-ND - BOARD DAUGHTER ICEPIC3
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
74
M9999-100207-1.5
Port 1 Control Register 1 (Offset 0x0500): P1CR1
This register contains the global per port control for the switch port 1 function.
Bit
Default
R/W
Description
15 – 8
0x00
RO
Reserved
7
0
RW
Broadcast storm protection enable
1 = enable broadcast storm protection for ingress packets on the port
0 = disable broadcast storm protection
6
0
RW
Diffserv priority classification enable
1 = enable diffserv priority classification for ingress packets on port
0 = disable diffserv function
5
0
RW
802.1p priority classification enable
1 = enable 802.1p priority classification for ingress packets on port
0 = disable 802.1p
4:3
0
RW
Port based priority classification
00 = ingress packets on port 1 will be classified as priority 0 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
01 = ingress packets on port 1 will be classified as priority 1 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
10 = ingress packets on port 1 will be classified as priority 2 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
11 = ingress packets on port 1 will be classified as priority 3 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
Note: “Diffserv”, “802.1p” and port priority can be enabled at the same
time. The OR’ed result of 802.1p and DSCP overwrites the port priority.
2
0
RW
Tag insertion
1 = when packets are output on the port, the switch will add 802.1p/q tags
to packets without 802.1p/q tags when received. The switch will not add
tags to packets already tagged. The tag inserted is the ingress port’s
“port VID”.
0 = disable tag insertion
1
0
RW
Tag removal
1 = when packets are output on the port, the switch will remove 802.1p/q
tags from packets with 802.1p/q tags when received. The switch will not
modify packets received without tags.
0 = disable tag removal
0
RW
TX Multiple Queues Select Enable
1 = the port output queue is split into four priority queues.
0 = single output queue on the port. There is no priority differentiation
even though packets are classified into high or low priority.
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