参数资料
型号: PIC18F442-I/P
厂商: Microchip Technology
文件页数: 85/134页
文件大小: 0K
描述: IC MCU FLASH 8KX16 EE A/D 40DIP
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 10
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 40MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,LVD,POR,PWM,WDT
输入/输出数: 34
程序存储器容量: 16KB(8K x 16)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 4.2 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 40-DIP(0.600",15.24mm)
包装: 管件
配用: DVA18XP400-ND - DEVICE ADAPTER 18F4220 PDIP 40LD
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
ACICE0206-ND - ADAPTER MPLABICE 40P 600 MIL
其它名称: PIC18F442I/P
PIC16C9XX
DS30444E - page 54
1997 Microchip Technology Inc.
8.5
Resetting Timer1 using the CCP
Trigger Output
If the CCP1 module is congured in compare mode to
generate a “special event trigger" (CCP1M3:CCP1M0
= 1011), this signal will reset Timer1.
Timer1 must be congured for either timer or synchro-
nized counter mode to take advantage of this feature. If
Timer1 is running in asynchronous counter mode, this
reset operation may not work.
In the event that a write to Timer1 coincides with a spe-
cial event trigger from CCP1, the write will take prece-
dence.
In this mode of operation, the CCPR1H:CCPR1L regis-
ters pair effectively becomes the period register for
Timer1.
Note:
The special event trigger from the CCP1
module will not set interrupt ag bit
TMR1IF (PIR1<0>).
8.6
Resetting of Timer1 Register Pair
(TMR1H:TMR1L)
TMR1H and TMR1L registers are not reset on a POR
or any other reset except by the CCP1 special event
trigger.
T1CON register is reset to 00h on a Power-on Reset. In
any other reset, the register is unaffected.
8.7
Timer1 Prescaler
The prescaler counter is cleared on writes to the
TMR1H or TMR1L registers.
TABLE 8-2: REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on
all other
resets
0Bh, 8Bh,
10Bh, 18Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
0Ch
PIR1
LCDIF
ADIF(1)
SSPIF
CCP1IF
TMR2IF
TMR1IF
00-- 0000
8Ch
PIE1
LCDIE
ADIE(1)
SSPIE
CCP1IE
TMR2IE
TMR1IE
00-- 0000
0Eh
TMR1L
Holding register for the Least Signicant Byte of the 16-bit TMR1 register
xxxx xxxx
uuuu uuuu
0Fh
TMR1H
Holding register for the Most Signicant Byte of the 16-bit TMR1 register
xxxx xxxx
uuuu uuuu
10h
T1CON
T1CKPS1
T1CKPS0
T1OSCEN
T1SYNC
TMR1CS
TMR1ON
--00 0000
--uu uuuu
Legend:
x
= unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by theTimer1 module.
Note
1: Bits ADIE and ADIF are reserved on the PIC16C923, always maintain these bits clear.
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