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| 型号： | PIC18F65J90-I/PT |
| 厂商： | Microchip Technology |
| 文件页数： | 11/41页 |
| 文件大小： | 0K |
| 描述： | IC PIC MCU FLASH 16KX16 64TQFP |
| 产品培训模块： | Asynchronous Stimulus PIC18 J Series MCU Overview 8-bit PIC® Microcontroller Portfolio |
| 标准包装： | 160 |
| 系列： | PIC® 18F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 40MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，LCD，LVD，POR，PWM，WDT |
| 输入/输出数： | 51 |
| 程序存储器容量： | 32KB（16K x 16） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 2K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2 V ~ 3.6 V |
| 数据转换器： | A/D 12x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 64-TQFP |
| 包装： | 托盘 |
| 产品目录页面： | 643 (CN2011-ZH PDF) |
| 配用： | AC162079-ND - HEADER MPLAB ICD2 18F85J90 64/80 AC164327-ND - MODULE SKT FOR 64TQFP |
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LPC2104_2105_2106_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 20 June 2008
19 of 41
NXP Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
6.14.1 Features
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Up to four (Timer 1) and three (Timer 0) 32-bit capture channels, that can take a
snapshot of the timer value when an input signal transitions. A capture event may also
optionally generate an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four (Timer 1) and three (Timer 0) external outputs corresponding to match
registers, with the following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
6.14.2 Features available in LPC2104/2105/2106/01 only
The LPC2104/2105/2106/01 can count external events on one of the capture inputs if the
external pulse lasts at least one half of the period of the PCLK. In this conguration,
unused capture lines can be selected as regular timer capture inputs or used as external
interrupts.
Timer can count cycles of either the peripheral clock (PCLK) or an externally supplied
clock.
When counting cycles of an externally supplied clock, only one of the timer’s capture
inputs can be selected as the timer’s clock. The rate of such a clock is limited to
PCLK
4. Duration of HIGH/LOW levels on the selected CAP input cannot be shorter
than 1
(2PCLK).
6.15 Watchdog timer
The purpose of the Watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the Watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the Watchdog within a predetermined
amount of time.
6.15.1 Features
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
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| PIC18F65J90T-I/PT | 功能描述:8位微控制器 -MCU 32KB Flash 2048bytes-RAM 51I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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| PIC18F65J94-I/PT | 制造商:Microchip Technology Inc 功能描述:64 PINS, 32KB FLASH, 4KB RAM, 16MIPS, NANOWATT XLP, LCD, USB - Trays 制造商:Microchip Technology Inc 功能描述:IC MCU 8BIT 32KB FLASH 64TQFP |
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