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参数资料
| 型号： | PIC18F6722T-I/PT |
| 厂商： | Microchip Technology |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC PIC MCU FLASH 64KX16 64TQFP |
| 产品培训模块： | Asynchronous Stimulus PIC18 J Series MCU Overview |
| 标准包装： | 1,200 |
| 系列： | PIC® 18F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 40MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，HLVD，POR，PWM，WDT |
| 输入/输出数： | 54 |
| 程序存储器容量： | 128KB（64K x 16） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 1K x 8 |
| RAM 容量： | 3.8K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4.2 V ~ 5.5 V |
| 数据转换器： | A/D 12x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 64-TQFP |
| 包装： | 带卷 (TR) |
| 配用： | MA180020-ND - MODULE PLUG-IN HPC EXPL 18F87J11 |
2006 Microchip Technology Inc.
DS80221C-page 5
PIC18F6627/6722/8627/8722
8.
Module: BOD
The BOD module may reset below the minimum
operating voltage of the device when configured
for BORV1:BORV0 = 11. The updated Reset
voltage specifications are shown in bold in
Work around
Use the next higher BOD voltage setting to ensure
a low VDD is detected above 2.0V.
Date Codes that pertain to this issue:
All engineering and production devices.
TABLE 2:
BROWN-OUT RESET VOLTAGE
9.
Module: EUSART
When performing back-to-back transmission in 9-bit
mode (TX9D bit in the TXSTAx register is set), the
second byte may be corrupted if it is written into
TXREGx immediately after the TMRT bit is set.
Work around
Execute a software delay, at least one-half the
transmission’s bit time, after TMRT is set and prior
to writing subsequent bytes into TXREGx.
Date Codes that pertain to this issue:
All engineering and production devices.
10. Module: EUSART
The EUSART auto-baud feature may periodically
measure the incoming baud rate incorrectly. The
rate of incorrect baud rate measurements will
depend on the frequency of the incoming
synchronization
byte
and
the
system
clock
frequency.
Work around
None.
11. Module: EUSART
In Synchronous mode (SYNC = 1) with clock
polarity high (SCKP = 1), the EUSART transmits a
shorter than expected clock on the CKx pin for the
last bit transmitted.
Work around
None.
12. Module: EUSART
In Synchronous mode, EUSART baud rates using
SPBRGx values of ‘0’ and ‘1’ may not function
correctly.
Work around
Use another baud rate configuration to generate
the desired baud rate.
13. Module: EUSART
After the last received byte has been read from the
EUSART receive buffer, RCREGx, the value is no
longer valid for subsequent read operations. The
RCREGx register should only be read once for
each byte received.
Work around
After each byte is received from the EUSART, store
the byte into a user variable. To determine when a
byte is available to read from RCREGx, poll the
RCIDL (BAUDCONx<6>) bit for a low-to-high
transition or use the EUSART receive interrupt,
RCxIF (PIRx<5>).
14. Module: EUSART
In 9-Bit Asynchronous Full-Duplex Receive mode,
received data may be corrupted if the TX9D bit
(TXSTAx<0>) is not modified immediately after
RCIDL (BAUDCONx<6>) is set.
Work around
Only write to TX9D when a reception is not in
progress (RCIDL = 1). No interrupt is associated
with RCIDL, therefore, it must be polled in software
to determine when TX9D can be updated.
15. Module: ECCP
PIC18F6XXX
device’s
Configuration
Word,
CONFIG3L, is not unimplemented and will switch
the ECCP2 output pin similar to the PIC18F8XXX
devices if the Processor mode does not select
Microcontroller mode.
Work around
In MPLAB IDE, program the PIC18F6XXX device
as its PIC18F8XXX equivalent and assign the
Processor mode bits (PM<1:0>) to ‘11’ for
Microcontroller mode.
D005 VBOR Brown-out Reset Voltage
PIC18LF6627/6722/8627/8722
BORV1:BORV0 = 11 N/A 2.05 N/A V
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