参数资料
型号: PIC18F85K90-I/PTRSL
厂商: Microchip Technology
文件页数: 106/110页
文件大小: 0K
描述: MCU PIC 32K FLASH XLP 80TQFP
产品培训模块: 8-bit PIC® Microcontroller Portfolio
标准包装: 119
系列: PIC® XLP™ 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 64MHz
连通性: I²C,LIN,SPI,UART/USART
外围设备: 欠压检测/复位,LCD,POR,PWM,WDT
输入/输出数: 69
程序存储器容量: 32KB(16K x 16)
程序存储器类型: 闪存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 5.5 V
数据转换器: A/D 24x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 80-TQFP
包装: 托盘
PIC18F47J53 FAMILY
DS39964B-page 552
Preliminary
2010 Microchip Technology Inc.
TABLE 31-31: 10-BIT A/D CONVERSION REQUIREMENTS
TABLE 31-32: 12-BIT A/D CONVERSION REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Max
Units
Conditions
130
TAD
A/D Clock Period
0.7
25.0(1)
sTOSC based, VREF 3.0V
131
TCNV
Conversion Time
(not including acquisition time)(2)
11
12
TAD
132
TACQ
Acquisition Time(3)
1.4
s-40C to +85C
135
TSWC
Switching Time from Convert
Sample
(Note 4)
137
TDIS
Discharge Time
0.2
s
Note 1:
The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.
2:
ADRES registers may be read on the following TCY cycle.
3:
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale after the con-
version (VDD to VSS or VSS to VDD). The source impedance (RS) on the input channels is 50W.
4:
On the following cycle of the device clock.
Param
No.
Symbol
Characteristic
Min
Max
Units
Conditions
130
TAD
A/D Clock Period
0.8
12.5(1)
sTOSC based, VREF 3.0V
131
TCNV
Conversion Time
(not including acquisition time)(2)
13
14
TAD
132
TACQ
Acquisition Time(3)
1.4
s
135
TSWC
Switching Time from Convert
Sample
(Note 4)
137
TDIS
Discharge Time
0.2
s
Note 1: The time of the A/D clock period is dependent on the device frequency and the TAD clock divider.
2: ADRES registers may be read on the following TCY cycle.
3: The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (VDD to VSS or VSS to VDD). The source impedance (RS) on the input channels is 50
.
4: On the following cycle of the device clock.
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