参数资料
型号: PIC18F87J90-I/PT
厂商: Microchip Technology
文件页数: 25/59页
文件大小: 0K
描述: IC PIC MCU FLASH 128KB 80-TQFP
产品培训模块: PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
标准包装: 119
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 48MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,LCD,LVD,POR,PWM,WDT
输入/输出数: 67
程序存储器容量: 128KB(64K x 16)
程序存储器类型: 闪存
RAM 容量: 3.8K x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 3.6 V
数据转换器: A/D 12x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 80-TQFP
包装: 托盘
产品目录页面: 644 (CN2011-ZH PDF)
配用: AC162079-ND - HEADER MPLAB ICD2 18F85J90 64/80
AC164323-ND - MODULE SKT FOR 100TQFP
2010 Microchip Technology Inc.
DS39933D-page 31
PIC18F87J90 FAMILY
2.0
GUIDELINES FOR GETTING
STARTED WITH PIC18FJ
MICROCONTROLLERS
2.1
Basic Connection Requirements
Getting started with the PIC18F87J90 family family of
8-bit microcontrollers requires attention to a minimal
set of device pin connections before proceeding with
development.
The following pins must always be connected:
All VDD and VSS pins
All AVDD and AVSS pins, regardless of whether or
not the analog device features are used
MCLR pin
ENVREG (if implemented) and VCAP/VDDCORE pins
These pins must also be connected if they are being
used in the end application:
PGC/PGD pins used for In-Circuit Serial
Programming (ICSP) and debugging purposes
OSCI and OSCO pins when an external oscillator
source is used
Additionally, the following pins may be required:
VREF+/VREF- pins are used when external voltage
reference for analog modules is implemented
The minimum mandatory connections are shown in
FIGURE 2-1:
RECOMMENDED
MINIMUM CONNECTIONS
Note:
The AVDD and AVSS pins must always be
connected, regardless of whether any of
the analog modules are being used.
PIC18FXXJXX
V
DD
V
SS
VDD
VSS
VDD
AV
DD
AV
SS
V
DD
V
SS
C1
R1
VDD
MCLR
VCAP/VDDCORE
R2
ENVREG
(1)
C7
C2(2)
C3(2)
C4(2)
C5(2)
C6(2)
Key (all values are recommendations):
C1 through C6: 0.1
F, 20V ceramic
C7: 10
F, 6.3V or greater, tantalum or ceramic
R1: 10 k
R2: 100 to 470
Note 1:
explanation of ENVREG pin connections.
2:
The example shown is for a PIC18F device
with five VDD/VSS and AVDD/AVSS pairs.
Other devices may have more or less pairs;
adjust the number of decoupling capacitors
appropriately.
(1)
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