参数资料
型号: PIC24FJ128GA110T-I/PT
厂商: Microchip Technology
文件页数: 16/18页
文件大小: 0K
描述: IC PIC MCU FLASH 100TQFP
标准包装: 1,200
系列: PIC® 24F
核心处理器: PIC
芯体尺寸: 16-位
速度: 32MHz
连通性: I²C,PMP,SPI,UART/USART
外围设备: 欠压检测/复位,LVD,POR,PWM,WDT
输入/输出数: 85
程序存储器容量: 128KB(43K x 24)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 3.6 V
数据转换器: A/D 16x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 100-TQFP
包装: 带卷 (TR)
配用: MA240015-ND - BOARD MCV PIM FOR 24F256GA
DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU
其它名称: PIC24FJ128GA110T-I/PTTR
2008-2011 Microchip Technology Inc.
DS80368L-page 7
PIC24FJ256GA110 FAMILY
14. Module: Core (Instruction Set)
If an instruction producing a read-after-write stall
condition is executed inside a REPEAT loop, the
instruction will be executed fewer times than was
intended. For example, this loop:
repeat #0xf
inc [w1],[++w1]
will execute less than 15 times.
Work around
Avoid using REPEAT to repetitively execute
instructions that create a stall condition. Instead,
use a software loop using conditional branches.
The MPLAB C Compiler will not generate
REPEAT
loops that cause this erratum.
Affected Silicon Revisions
15. Module: Memory (Program Space
Visibility)
When accessing data in the PSV area of data
RAM, it is possible to generate a false address
error trap condition by reading data located pre-
cisely at the lower address boundary (8000h). If
data is read using an instruction with an
auto-decrement, the resulting RAM address will be
below the PSV boundary (i.e., at 7FFEh); this will
result in an address error trap.
This false address error can also occur if a 32-bit
MOV
instruction is used to read the data at location
8000h.
Work around
Do not use the first location of a PSV page (address
8000h). The MPLAB C Compiler (v3.11 or later)
supports the option “-merrata=psv_trap” to
prevent it from generating code that would cause this
erratum.
Affected Silicon Revisions
16. Module: ICSP
The
ICSP/ICD
port
pair,
PGEC3/PGED3
(RB5/RB4), cannot be used to read or program the
device.
Work around
Use either PGEC2/PGED2 or PGEC1/PGED1.
Affected Silicon Revisions
17. Module: RTCC
Under certain circumstances, the value of the Alarm
Repeat Counter register (ALCFGRPT<7:0>) may
be unexpectedly decremented. This happens only
when a byte write to the upper byte of ALCFGRPT
is performed in the interval between a device
POR/BOR and the first edge from the RTCC clock
source.
Work around
Do not perform byte writes on ALCFGRPT,
particularly the upper byte.
Alternatively, wait until one period of the SOSC
has completed before performing byte writes to
ALCFGRPT.
Affected Silicon Revisions
A3
A5
A6
XX
X
A3
A5
A6
X
A3
A5
A6
X
A3
A5
A6
X
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