参数资料
型号: PIC32MX575F256LT-80I/PT
厂商: Microchip Technology
文件页数: 43/64页
文件大小: 0K
描述: IC MCU 32BIT 256KB FLASH 100TQFP
标准包装: 1,200
系列: PIC® 32MX
核心处理器: MIPS32? M4K?
芯体尺寸: 32-位
速度: 80MHz
连通性: CAN,I²C,SPI,UART/USART,USB OTG
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 85
程序存储器容量: 256KB(256K x 8)
程序存储器类型: 闪存
RAM 容量: 64K x 8
电压 - 电源 (Vcc/Vdd): 2.3 V ~ 3.6 V
数据转换器: A/D 16x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 100-TQFP
包装: 带卷 (TR)
PIC32MX
DS61145K-page 48
2007-2012 Microchip Technology Inc.
TABLE 18-2:
DEVCFG LOCATIONS
TABLE 18-3:
DEVCFG LOCATIONS FOR
PIC32MX1X0 AND
PIC32MX20X DEVICES ONLY
On Power-on Reset (POR), or any Reset, the Configu-
ration Words are copied from the boot Flash memory to
their corresponding Configuration registers. A Configu-
ration bit can only be programmed = 0 (unprogrammed
state = 1).
During programming, a Configuration Word can be pro-
grammed a maximum of two times before a page erase
must be performed.
After programming the Configuration Words, the device
must be reset to ensure that the Configuration registers
are reloaded with the new programmed data.
These configuration words determine the oscillator
source. If using the 2-wire Enhanced ICSP mode the
configuration words are ignored and the device will
always use the FRC. In 4-wire mode this is not the case.
If an oscillator source is selected by the configuration
words that is not present on the part after reset, the pro-
grammer will not be able to perform flash operations on
the device after it is reset. See the “Special Features”
chapter in the specific device data sheet for details
regarding oscillator selection using the configuration
words.
18.1.1
CONFIGURATION REGISTER
PROTECTION
To prevent inadvertent Configuration bit changes dur-
ing code execution, all programmable Configuration
bits are write-once. After a bit is initially programmed
during a power cycle, it cannot be written to again.
Changing a device configuration requires changing the
Configuration data in the boot Flash memory, and
cycling power to the device.
To ensure integrity of the 128-bit data, a comparison is
made between each Configuration bit and its stored
complement continuously. If a mismatch is detected, a
Configuration Mismatch Reset is generated, which
causes a device Reset.
Configuration Word
Address
DEVCFG0
0xBFC0_2FFC
DEVCFG1
0xBFC0_2FF8
DEVCFG2
0xBFC0_2FF4
DEVCFG3
0xBFC0_2FF0
Configuration Word
Address
DEVCFG0
0x1FC0_2FFC
DEVCFG1
0x1FC0_2FF8
DEVCFG2
0x1FC0_2FF4
DEVCFG3
0x1FC0_2FF0
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