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参数资料
| 型号： | PLC0569 |
| 厂商： | TEMEX COMPONENTS |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 577.52 MHz, QCC14 |
| 文件页数： | 2/3页 |
| 文件大小： | 547K |
| 代理商： | PLC0569 |
PLC0569 567.52-577.52MHz
PLL synthesiser for BTS CDMA applications
(rev-W1)
October 20, 2006
1
TEMEX reserves the right to modify herein specifications and informations at any time when necessary to provide optimum performance and cost.
Fr eq ue ncy
Ref
Parameters
Unit
Min.
Typ.
Max.
Comment
1
Frequency range
1.1
Operating frequency
MHz
567.52
577.52 Lock range
2
Temperature range
2.1
Operating
Deg. C
-10
+85
2.2
Storage Temperature Range
Deg. C
-40
+85
3
Output
3.1
Power
dBm
-3
0
+3
3.2
Z out
ohm
50
3.3
Return Loss
dB
10
4
Reference Frequency
4.1
Reference frequency
MHz
15
4.2
Input level
Vp-p
0.5
1
2
4.3
Reference input impedance
kohm
1
5
Harmonics and spurs
5.1
Harmonics
dBc
-20
5.2
Spurious at comparison frequency dBc
-70
5.3
Reference freq. breakthrough
dBc
-80
5.4
Other spurious
dBc
-80
From 0 to 15MHz
6
Lock Detect
6.1
Lock Detect alarm High
Volt
2.5
3.3
Locked
6.2
Lock Detect alarm Low
Volt
0
0.4
Unlocked
7
Frequency Lock Time
ms
200
Within±1kHz
7.1
Closed Loop Corner Frequency
Hz
500
7.2
Closed Loop Peak
dBc
4
Low Pass Frequency Response
8
Phase Noise
8.1
Offset
@
100Hz
dBc/Hz
-60
8.2
Offset
@
1kHz
dBc/Hz
-75
8.3
Offset
@
10kHz
dBc/Hz
-100
8.4
Offset
@
100kHz
dBc/Hz
-130
8.5
Offset
@
1MHz
dBc/Hz
-150
8.6
Integrated Noise 100Hz to 1MHz
Deg. rms
2.0
9
Switching Time
ms
10
10
Step Size
kHz
5
11
Power Supply
11.1 Chip Supply voltage
Volt
3.15
3.3
3.45
11.2 Chip Current
mA
5
11.3 VCO Supply voltage
Volt
4.75
5.0
5.25
11.4 VCO Current
mA
30
12
Programming
Standard 3 wire serial, 3.3 volt CMOS, ADF4113 or equivalent
12.1 Digital Inputs High
Volt
0.8 Vpll
Vpll+0.3
12.1 Digital Inputs High
Volt
0
0.4
13
Package
SMP3
Specifications
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