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参数资料
| 型号： | PM5312 |
| 厂商： | PMC-SIERRA INC |
| 元件分类： | 数字传输电路 |
| 英文描述： | SONET/SDH Transport Overhead Terminating Transceiver |
| 中文描述： | TERMINATOR, PQFP208 |
| 封装： | 28 X 28 MM, HEAT SINK, PLASTIC, QFP-208 |
| 文件页数： | 1/2页 |
| 文件大小： | 77K |
| 代理商： | PM5312 |
PMC-931128 (R6)
1998 PMC-Sierra, Inc. September, 1998
PM5312
STTX
PMC-Sierra,Inc.
SONET/SDH Transport Overhead Terminating Transceiver
FEATURES
Monolithic, SONET/SDH Transport
Overhead Terminating Transceiver for
use in STS-1, STS-3 (STM-1), or
STS-12 (STM-4) applications.
Operates in STS-1 bit-serial mode,
STS-1 byte-serial mode, STS-3/STM-1
byte-serial mode, or STS-12/ATM-4
byte-serial mode.
Compatible with PM5355 S/UNI-622
physical layer interface, PM5344
SPTX SONET/SDH Path Terminating
Transceiver, and with commercially
available 622 Mbit/s serial-to-parallel
conversion devices.
Performs byte-interleaved multiplexing
of lower-rate, drop-side, SONET/SDH
data streams.
Optionally inserts the framing bytes
(A1 and A2) and the STS identification
bytes (C1) in to the transmit stream.
Performs frame synchronous
descrambling and scrambling.
Compares the bit-interleaved parity
error detection codes (B1 and B2) for
the receive stream. Inserts B1 and B2
in the transmit stream.
Inserts line Far-End Block Errors
(FEBEs) into the Z2 growth byte based
on received B2 errors.
Accumulates near-end errors (B1 and
B2) and far-end errors (Z2).
Extracts and inserts the order wire
channels (E1 and E2).
Extracts and inserts the data
communications channels (D1-D3 and
D4-D12).
Extracts and inserts the section user
channel (F1).
Extracts and inserts the Automatic
Protection Switch (APS) channel (K1
and K2). The receive APS bytes are
also filtered and extracted into internal
registers.
Detects Loss Of Signal (LOS), Out Of
Frame (OOF), Loss Of Frame (LOF),
Far-End Receive Failure (FERF), line
Alarm Indication Signal (AIS), and
protection switching byte failure
alarms.
Inserts FERF and AIS in the transmit
stream.
Provides LOS insertion, framing
pattern error insertion, and coding
violation insertion (B1 and B2) for
diagnostic purposes. B1 and B2 error
can also be generated “on-the-fly”
using an error insertion mask.
Provides a transmit and receive ring
control port, allowing alarm and
maintenance signal control and status
to be passed between mate STTXs for
applications in ring-based add/drop
multiplexers.
Low power, +5 V, CMOS technology.
Device has TTL/CMOS-compatible
inputs and outputs.
Available in a high performance 208-
pin copper slugged (28 by 28 mm)
Plastic Quad Flat Pack (PQFP)
package.
APPLICATIONS
OC-N to OC-M Multiplexers
SONET/SDH Add/Drop Multiplexers
SONET/SDH Terminal Multiplexers
ATM Transmission Systems
Broadband ISDN User Network
Interfaces (UNIs)
SONET/SDH Test Equipment
BLOCK DIAGRAM
Transmit
Ring Control
Port
T
R
T
L
Line Side
System Side
Status Control
Port
S
S
Transmit Section
(Regenerator Section)
O/H Processor
Receive Section
(Regenerator
Section)
O/H Processor
Transmit Line
(Multiplexer Section)
O/H Processor
Receive Line
(Multiplexer Section)
O/H Processor
T
T
T
T
T
TOFP
TOUT[7:0]
TSOUT
Par/Ser
TSICLK
RICLK
RIFP
RIN[7:0]
RSIN
Ser/Par
RSICLK
Receive Ring
Control Port
E
L
L
O
B
R
R
R
R
R
B
R
R
R
R
R
Microprocessor
Interface
D
A
A
A
C
W
R
R
I
S
S
Byte
Interleaved
Multiplex
Byte
Interleaved
Demultiplex
ROUT1[7:0]
ROUT2[7:0]
ROUT3[7:0]
ROUT4[7:0]
ROCLK
ROFP
Transmit
O/H
Access
R
R
R
TIN1[7:0]
TIN2[7:0]
TIN3[7:0]
TIN4[7:0]
TICLK
TIFP
TDIS
G
T
Receive O/H
Access
T
T
T
T
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相关代理商/技术参数 |
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