PM7329 S/UNI-APEX-1K800
DATASHEET
PMC-2010141
ISSUE 2
ATM TRAFFIC MANAGER AND SWITCH
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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LIST OF TABLES
TABLE 1
- TERMINOLOGY ............................................................................ 1
TABLE 2
- SAMPLE FEATURE SET AS A FUNCTION OF MEMORY
CAPACITY ..................................................................................... 15
TABLE 3
- PIN TYPE DEFINITION............................................................... 17
TABLE 4
- NUMBER OF PORTS SUPPORTED, RECEIVE INTERFACE.... 51
TABLE 5
- NUMBER OF PORTS SUPPORTED, TRANSMIT INTERFACE.. 54
TABLE 6
- EXAMPLE WIRR TRANSMISSION SEQUENCE........................ 57
TABLE 7
- AVAILABLE QUEUING PROCEDURES...................................... 69
TABLE 8
- OAM & RRM CELL IDENTIFICATION......................................... 74
TABLE 9
- CONGESTION ERROR FLAGS.................................................. 78
TABLE 10 - CONGESTION DISCARD RULES SELECTION ......................... 79
TABLE 11 - STATISTICAL COUNTS .............................................................. 83
TABLE 12 - IN/OUT BOUND CLP STATE FOR STATISTICAL COUNTS....... 84
TABLE 13 - CONGESTION RULE & COUNT SUMMARY.............................. 84
TABLE 14 - RECEIVE INTERFACE THROUGHPUT, MCELLS/SEC ............. 94
TABLE 15 - QUEUE ENGINE THROUGHPUT, MCELLS/SEC....................... 95
TABLE 16 - TRANSMIT INTERFACE THROUGHPUT, MCELLS/SEC........... 95
TABLE 17 - EXTERNAL QUEUE CONTEXT MEMORY MAP....................... 154
TABLE 18 - INTERNAL QUEUE CONTEXT MEMORY MAP........................ 154
TABLE 19 - INTERNAL WAN PORT SCHEDULER CONTEXT MEMORY MAP
155
TABLE 20 - INTERNAL LOOP PORT SCHEDULER CONTEXT MEMORY MAP
155
TABLE 21 - 2 BIT LOGARITHMIC, 2 BIT FRACTIONAL.............................. 156