参数资料
型号: PMB2307R
厂商: SIEMENS A G
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 220 MHz, PDSO16
封装: PLASTIC, TSSOP-16
文件页数: 8/28页
文件大小: 706K
代理商: PMB2307R
PMB 2307R
Semiconductor Group
14
02.96
1.8
Programming Tables
1) No ABL gating performed
2) In general the shortest anti-backlash pulse gives the best system performance
1)
Connected to
VREF net with internal resistor (see page 19).
Status Bits
Anti-Backlash
Pulse Width 2
Anti-Backlash
Pulse Width 1
tW (typ.)
[ns]
0
1.3
V
DD = 5 V
01
5
1
0
10
not recommended
11
131) 2)
any application where continuous
lock detect is required
Status Bits
Preamplifier Function Mode
Single/Dual
Mode
Preamplifier
Select
0
FI-input frequency, single HF-mode
0
1
FI-input frequency, single LF-mode
1
0
FI-input frequency, dual-mode, FI-trigger edge LH,
MOD A
1
FI-input frequency, dual-mode, FI-trigger edge HL,
MOD B
Standby Table
Output Pins
Status
MFO 1
MFO 2
LD
PD
MOD
Φ
V
Φ
VN
Standby 1
low
high
1)
tristate
low
Standby 2
low
high
tristate
low
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