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参数资料
| 型号： | PMF8118VSRF |
| 厂商： | ERICSSON POWER MODULES AB |
| 元件分类： | 电源模块 |
| 英文描述： | 1-OUTPUT 12.5 W DC-DC REG PWR SUPPLY MODULE |
| 封装： | ROHS COMPLIANT, SMD-10 |
| 文件页数： | 16/16页 |
| 文件大小： | 754K |
| 代理商： | PMF8118VSRF |
Ericsson Internal
PRODUCT SPECIFICATION
2 (4)
Prepared (also subject responsible if other)
No.
SEC/D ESECZHW
3/1301-BMR643 8/M Uen
Approved
Checked
Date
Rev
Reference
SEC/D LINDA
ESKEVIN
2006-2-27
A
External Capacitors
Input capacitors:
The recommended input capacitors are determined by the
560 F minimum capacitance and 1000 mArms minimum
ripple current rating.
Output capacitors (required):
A 940 F low-ESR electrolytic output capacitance Is required
to meet specification as defined in the electrical specification.
Output capacitors (optional):
The recommended output capacitance of 400 F ceramic
capacitor will allow the module to meet its transient response
specification as defined in the electrical specification.
When using one or more non-ceramic capacitors, the
calculated equivalent ESR should be no lower than 4 m
(Use 7 m as the minimum when using max-ESR values to
calculate).
Input And Output Impedance
The impedance of both the input source and the load will
interact with the impedance of the DC/DC regulator. It is
important that the input source has low characteristic
impedance. The regulators are designed for stable operation
without external capacitors connected to the input or output.
The performance in some applications can be enhanced by
addition of external capacitance as described under External
Decoupling Capacitors. If the input voltage source contains
significant inductance, the addition of a 100 F capacitor
across the input of the regulator will ensure stable operation.
The capacitor is not required when powering the DC/DC
regulator from an input source with an inductance below
10 H.
External Decoupling Capacitors
When powering loads with significant dynamic current
requirements, the voltage regulation at the point of load can
be improved by addition of decoupling capacitors at the load.
The most effective technique is to locate low ESR ceramic
and electrolytic capacitors as close to the load as possible,
using several parallel capacitors to lower the effective ESR.
The ceramic capacitors will handle high-frequency dynamic
load changes while the electrolytic capacitors are used to
handle low frequency dynamic load changes. Ceramic
capacitors will also reduce any high frequency noise at the
load.
It is equally important to use low resistance and low
inductance PCB layouts and cabling.
External decoupling capacitors will become part of the
control loop of the DC/DC regulator and may affect the
stability margins. As a “rule of thumb”, 100 F/A of output
current can be added without any additional analysis. The
ESR of the capacitors is a very important parameter. Power
Modules guarantee stable operation with a verified ESR value
of >10 m across the output connections.
For further information please contact your local Ericsson
Power Modules representative.
Remote Sense
The DC/DC regulators have remote sense that can be used to
compensate for voltage drops between the output and the
point of load. The sense traces should be located close to the
PCB ground layer to reduce noise susceptibility. The remote
sense circuitry will compensate for up to 0.3v voltage drop
between output pins and the point of load.
If the remote sense is not needed, Vsen can be left open.
Over Current Protection (OCP)
The regulators include current limiting circuitry for protection
at continuous overload.
The output voltage will decrease towards zero for output
currents in excess of current limit threshold. The regulator will
resume normal operation after removal of the overload. The
load distribution should be designed for the maximum output
short circuit current specified. The current limit operation is a
“hick up” mode.
Generation of the BusTermination Voltage
The voltage at V
REF is the reference voltage for the system bus
receiver comparators. It is normally set to precisely half the
bus driver supply voltage (VDDQ/2), using a resistor divider.
The Thevenin impedance of the network driving the VREF pin
should not exceed 500 ohm
The module senses V
REF to regulate the output voltage VTT, the
required bus termination supply voltage
. V
TT is active about
20 ms after a valid V
REF input source is applied to the module.
Once active V
TT will track the voltage applied at VREF.
E
PMF 8000F series
POL regulator, Input 10.8-13.2 V, Output 10 A/18 W
EN/LZT 146 333 R1B April 2006
Ericsson Power Modules AB
Technical Specication
E
PMF 8000F series
POL regulator, Input 10.8-13.2 V, Output 10 A/18 W
EN/LZT 146 333 R1C April 2007
Ericsson Power Modules AB
Technical Specication
9
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