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参数资料
| 型号： | PN-DESIGNKIT-16 |
| 厂商： | Bourns Inc. |
| 文件页数： | 4/6页 |
| 文件大小： | 0K |
| 描述： | KIT LVDS PORT SURGE PROTECTION |
| 标准包装： | 1 |
| 系列： | PortNote™ |
| 套件类型： | 电涌抑制 |
| 套件包括： | 30 件 - 3 种值 |
| 包装： | 带装箱指南的塑料箱 |
| 工具箱内容： | (10) CDSOT23-S2004CT-ND - DIODE ARRAY 240V 225MA SOT23 (10) 2031-42T-SM-RPLFCT-ND - GAS TUBE 360V 1KA 2POLE SMD (10) TBU-CA085-200-WHCT-ND - SURGE SUPP TBU 200MA 850VIMP SMD |
TBU-CA Series - TBU ? High-Speed Protectors
Product Dimensions
0.70
(.028)
0.80
6.50 ± 0.10
(.256 ± .004)
0.85 ± 0.05
(.033 ± .002)
1.85
(.073)
0.30
(.012)
(.031)
0.70
(.028)
1.85
(.073)
4.00 ± 0.10
(.157 ± .004)
3.40
(.134)
PIN 1 & BACKSIDE CHAMFER
0.30
(.012)
C
0.25
(.010)
PIN 1
0.00 - 0.05
Pad Designation
(.000 - .002)
Pad #
Pin Out
DIMENSIONS:
MM
(INCHES)
1
2
3
Line In/Out
NU
Line Out/In
Recommended Pad Layout
TBU ? High-Speed Protectors have a 100 % matte-tin termination
?nish. For improved thermal dissipation, the recommended layout
uses PCB copper areas which extend beyond the exposed solder
pad. The exposed solder pads should be de?ned by a solder mask
which matches the pad layout of the TBU ? device in size and spac-
ing. It is recommended that they should be the same dimension as
the TBU ? pads but if smaller solder pads are used, they should be
centered on the TBU ? package terminal pads and not more than
0.10-0.12 mm (0.004-0.005 in.) smaller in overall width or length.
3
2
1
Solder pad areas should not be larger than the TBU ? pad sizes
to ensure adequate clearance is maintained. The recommended
stencil thickness is 0.10-0.12 mm (0.004-0.005 in.) with a stencil
opening size 0.025 mm (0.0010 in.) less than the solder pad size.
Extended copper areas beyond the solder pad signi?cantly improve
the junction to ambient thermal resistance, resulting in operation
at lower junction temperatures with a corresponding bene?t of reli-
ability. All pads should soldered to the PCB, including pads marked
as NC or NU but no electrical connection should be made to these
Dark grey areas show added PCB copper area for better
thermal resistance.
pads. For minimum parasitic capacitance, it is recommended that
signal, ground or power signals are not routed beneath any pad.
Speci?cations are subject to change without notice.
Customers should verify actual device performance in their speci?c applications.
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