UPDATED 11/22/2004 High EffICiency Heterojunction Power FET Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 page 1 of 2 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com Revised November 2004 FEATURES ? NON-HERMETIC LOW COST CERAMIC 70MIL PACKAGE ? +25.5 dBm OUTPUT POWER AT 1dB COMPRESSION ? 7.0 dB POWER GAIN AT 12GHz ? 0.3 x 800 MICRON RECESSED “MUSHROOM” GATE ? Si3N4 PASSIVATION ? ADVANCED EPITAXIAL HETEROJUNCTION PROFILE PROVICES EXTRA HIGH POWER EFFICIENCY AND HIGH RELIABILITY ELECTRICAL CHARACTERISTICS (Ta = 25°C) Caution! ESD sensitive device. SYMBOL PARAMETERS/TEST CONDITIONS1 MIN TYP MAX UNITS 21.5 23.5 P1dB Output Power at 1dB Compression f = 12GHz VDS = 6V, IDS ≈ 50% IDSS f = 18GHz 23.5 dBm 9.0 10.5 G1dB Gain at 1dB Compression f = 12GHz VDS = 6V, IDS ≈ 50% IDSS f = 18GHz 7.0 dB PAE Power Added Efficiency at 1dB Compression VDS = 6V, IDS ≈ 50% IDSS f = 12GHz 45 % IDSS Saturated Drain Current VDS = 3 V, VGS = 0 V 70 120 160 mA GM Transconductance VDS = 3 V, VGS = 0 V 80 130 mS VP Pinch-off Voltage VDS = 3 V, IDS = 1.0 mA -1.0 -2.5 V BVGD Drain Breakdown Voltage IGD = 1.0mA -9 -15 V BVGS Source Breakdown Voltage IGS = 1.0mA -6 -14 V RTH Thermal Resistance 250* o C/W Notes: * Overall Rth depends on case mounting. MAXIMUM RATINGS AT 25OC SYMBOL PARAMETERS ABSOLUTE1 CONTINUOURS2 VDS Drain to Source Voltage 10 V 6 V VGS Gate to Source Voltage -6 V -3 V IDS Drain Current Idss 75 mA IGSF Forward Gate Current 20 mA 3 mA PIN Input Power 20 dBm @ 3dB compression PT Total Power Dissipation 550mW 455mW TCH Channel Temperature 175°C 150°C TSTG Storage Temperature -65/+175°C -65/+150°C