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参数资料
| 型号： | PSD313-B-70J |
| 厂商： | 意法半导体 |
| 英文描述： | Current Mode PWM Controller 14-SOIC 0 to 70 |
| 中文描述： | 低成本现场可编程微控制器外围设备 |
| 文件页数： | 18/85页 |
| 文件大小： | 691K |
| 代理商： | PSD313-B-70J |
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15
PSD3XX Famly
10.0
I/OPort
Functions
The PSD3XX has three I/O ports (Ports A, B, and C) that are configurable at the bit level.
This permits great flexibility and a high degree of customization for specific applications.
The next section describes the control registers for the ports. Following that are sections
that describe each port. Figures 5 through 7 show the structure of Ports A through C,
respectively.
Note:
any unused input should be connected directly to ground or pulled up to V
CC
(using a 10K
to 100K
resistor).
10.1 CSIOPORT Registers
Control of the ports is primarily handled through the CSIOPORT registers. There are 24
bytes in the address space, starting at the base address labeled CSIOPORT. Since the
PSD3XX uses internal address lines A15-A8 for decoding, the CSIOPORT space will
occupy 2 Kbytes of memory, on a 2 Kbyte boundary. This resolution can be improved to
reduce wasted address space by connecting lower order address lines (A7 and below)
to Port C. Using this method, resolution down to 256 Kbytes may be achieved. The
CSIOPORT space
must be defined in your PSDsoft design file
. The following tables list
the registers located in the CSIOPORT space.
16-Bit Users Note
When referring to Table 5B, realize that Ports A and B are still accessible on a byte basis.
Note: When accessing Port B on a 16-bit data bus, BHE must be low.
Table 5A. CSIOPORT Registers for 8-Bit Data Busses
NOTE:
1. ZPSD only.
Ofset (in hex)
fromCSIOPORT
Base Address
Type of
Access
Allowed
Register Name
Port A Pin Register
Port A Direction Register
Port A Data Register
Port B Pin Register
Port B Direction Register
Port B Data Register
Power Management Register (Note 1)
Page Register
+2
+4
+6
+3
+5
+7
+10
+18
Read
Read/Write
Read/Write
Read
Read/Write
Read/Write
Read/Write
Read/Write
Table 5B. CSIOPORT Registers for 16-Bit Data Busses
NOTE:
1. ZPSD only.
Ofset (in hex)
fromCSIOPORT
Base Address
Type of
Access
Allowed
Register Name
Port A/B Pin Register
Port A/B Direction Register
Port A/B Data Register
Power Management Register (Note 1)
Page Register
+2
+4
+6
+10
+18
Read
Read/Write
Read/Write
Read/Write
Read/Write
相关PDF资料 |
PDF描述 |
|---|---|
| PSD313-B-70L | Low Cost Field Programmable Microcontroller Peripherals |
| PSD313R-B-90JI | Current Mode PWM Controller 8-PDIP 0 to 70 |
| PSD313V-90J | Low Cost Field Programmable Microcontroller Peripherals |
| PSD313V-90JI | Current-Mode PWM Controller 14-SOIC 0 to 70 |
| PSD313V-90JM | Current-Mode PWM Controller 8-SOIC 0 to 70 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD313B-70J | 功能描述:SPLD - 简单可编程逻辑器件 5.0V 1M 70ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD313-B-70L | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD313-B-70M | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD313-B-70U | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD313B90JI | 制造商:WSI 功能描述: |
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