PSD4235F2-70UI PDF资料下载(53/93 页)Flash In-System-Programmable Peripherals for 16-Bit MCUs

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参数资料

型号：	PSD4235F2-70UI
厂商：	意法半导体
英文描述：	Flash In-System-Programmable Peripherals for 16-Bit MCUs
中文描述：	Flash在系统可编程外设的16位微控制器
文件页数：	53/93页
文件大小：	503K
代理商：	PSD4235F2-70UI

PSD4000 Series

Preliminary Information

9.4.3 Port Configuration Registers (PCRs)

Each port has a set of PCRs used for configuration. The contents of the registers can be

accessed by the microcontroller through normal read/write bus cycles at the addresses

given in Table 6. The addresses in Table 6 are the offsets in hex from the base of the

CSIOP register.

The pins of a port are individually configurable and each bit in the register controls its

respective pin. For example, Bit 0 in a register refers to Bit 0 of its port. The three PCRs,

shown in Table 19, are used for setting the port configurations. The default power-up state

for each register in Table 22 is 00h.

Port

MCU Access

Control

Direction

Drive Select*

E,F,G

A,B,C,D,E,F,G

Write/Read

Table 19. Port Configuration Registers

NOTE:

See Table 22 for Drive Register bit definition.

The

PSD4000

Functional

Blocks

(cont.)

9.4.3.1 Control Register

Any bit set to

‘

’

in the Control Register sets the corresponding Port pin to MCU I/O Mode,

and a

‘

’

sets it to Address Out Mode. The default mode is MCU I/O. Only Ports E, F and

G have an associated Control Register.

9.4.3.2 Direction Register

The Direction Register controls the direction of data flow in the I/O Ports. Any bit set to

‘

’

in the Direction Register will cause the corresponding pin to be an output, and any bit set

‘

’

will cause it to be an input. The default mode for all port pins is input.

Figures 21 and 23 show the Port Architecture diagrams for Ports A/B/C and E/F/G

respectively. The direction of data flow for Ports A, B, C and F are controlled by the

direction register.

An example of a configuration for a port with the three least significant bits set to output

and the remainder set to input is shown in Table 21. Since Port D only contains four pins,

the Direction Register for Port D has only the four least significant bits active.

Direction Register Bit

Port Pin Mode

Input

Output

Table 20. Port Pin Direction Control

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Table 21. Port Direction Assignment Example

相关PDF资料	PDF描述
PSD4235F2-90B81	Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-90B81I	Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-90J	Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-90JI	Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235F2-90M	Flash In-System-Programmable Peripherals for 16-Bit MCUs

相关代理商/技术参数	参数描述
PSD4235G2-70U	功能描述:SPLD - 简单可编程逻辑器件 5.0V 4M 70ns RoHS:否制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
PSD4235G2-90U	功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD4235G2-90UI	功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
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PSD4235G2V-90U	功能描述:CPLD - 复杂可编程逻辑器件 3.3V 4M 90ns RoHS:否制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100

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