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| 型号： | PSD4235G2 |
| 英文描述： | Flash In-System-Programmable Peripherals for 16-Bit MCUs(用于16位MCU的闪速在系统可编程外围芯片) |
| 中文描述： | Flash在系统可编程外设的16位微控制器（用于16位微控制器的闪速在系统可编程外围芯片） |
| 文件页数： | 2/114页 |
| 文件大小： | 567K |
| 代理商： | PSD4235G2 |
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i
PSD4000 Series
PSD4235G2
Flash In-System-Programmable Peripherals for 16-Bit MCUs
Table of Contents
For additional information,
Call 800-TEAM-WSI (800-832-6974).
Fax: 510-657-8495
Web Site: http://www.waferscale.com
E-mail: info@waferscale.com
Introduction ........................................................................................................................................................................................1
In-System Programming (ISP) JTAG .......................................................................................................................................2
In-Application re-Programming (IAP) .......................................................................................................................................2
Key Features......................................................................................................................................................................................3
PSD4000 Family................................................................................................................................................................................3
Block Diagram....................................................................................................................................................................................4
Architectural Overview.......................................................................................................................................................................5
Memory ....................................................................................................................................................................................5
PLDs.........................................................................................................................................................................................5
I/O Ports ...................................................................................................................................................................................5
Microcontroller Bus Interface....................................................................................................................................................6
ISP via JTAG Port ....................................................................................................................................................................6
In-System Programming...........................................................................................................................................................6
In-Application re-Programming (IAP) .......................................................................................................................................6
Page Register...........................................................................................................................................................................6
Power Management Unit..........................................................................................................................................................6
Development System.........................................................................................................................................................................7
Pin Descriptions.................................................................................................................................................................................8
Register Description and Address Offset.........................................................................................................................................11
Register Bit Definition ......................................................................................................................................................................12
Functional Blocks.............................................................................................................................................................................16
Memory Blocks.......................................................................................................................................................................16
Main Flash and Secondary Flash Memory Description ...................................................................................................16
SRAM...............................................................................................................................................................................27
Memory Chip Selects.......................................................................................................................................................27
Page Register ..................................................................................................................................................................30
Memory ID Registers .......................................................................................................................................................31
PLDs.......................................................................................................................................................................................32
Decode PLD (DPLD)........................................................................................................................................................34
Complex PLD (CPLD)......................................................................................................................................................34
Microcontroller Bus Interface..................................................................................................................................................42
Interface to a Multiplexed Bus..........................................................................................................................................42
Interface to a Non-multiplexed Bus..................................................................................................................................42
Data Byte Enable Reference ...........................................................................................................................................44
Microcontroller Interface Examples..................................................................................................................................45
I/O Ports .................................................................................................................................................................................50
General Port Architecture ................................................................................................................................................50
Port Operating Modes......................................................................................................................................................52
Port Configuration Registers (PCRs)...............................................................................................................................55
Port Data Registers..........................................................................................................................................................58
Ports A, B and C – Functionality and Structure ...............................................................................................................59
Port D – Functionality and Structure................................................................................................................................60
Port E – Functionality and Structure ................................................................................................................................60
Port F – Functionality and Structure ................................................................................................................................61
Port G – Functionality and Structure................................................................................................................................61
相关PDF资料 |
PDF描述 |
|---|---|
| PSD4235G2 | FLASH IN-SYSTEM PROGRAMMABLE (ISP) PERIPHERALS FOR 16-BIT MCUS (5V SUPPLY) |
| PSD4235G2V | -200V 100kRad Hi-Rel Single P-Channel TID Hardened MOSFET in a TO-254AA package; A JANSR2N7426 with Standard Packaging |
| PSD4235G1-B-12J | Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply |
| PSD4235F2-A-12J | Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply |
| PSD4235G2-A-12J | Flash In-System Programmable ISP Peripherals For 16-bit MCUs 5V Supply |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD4235G2-70U | 功能描述:SPLD - 简单可编程逻辑器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD4235G2-90U | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2-90UI | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2V-12UI | 功能描述:CPLD - 复杂可编程逻辑器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2V-90U | 功能描述:CPLD - 复杂可编程逻辑器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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