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参数资料
| 型号： | PSD4235G3-12MI |
| 厂商： | 意法半导体 |
| 英文描述： | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| 中文描述： | Flash在系统可编程外设的16位微控制器 |
| 文件页数： | 6/93页 |
| 文件大小： | 503K |
| 代理商： | PSD4235G3-12MI |
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Preliminary Information
PSD4000 Series
J
A simple interface to 16-bit microcontrollers that use either multiplexed or
non-multiplexed busses. The bus interface logic uses the control signals generated by
the microcontroller automatically when the address is decoded and a read or write is
performed. A partial list of the MCU families supported include:
Intel 80196, 80296, 80186, and 80386EX
Motorola 68HC16, 68HC12, 683XX, and MC2001
Philips 80C51XA
Infineon C16X devices
Hitachi H8
J
4 Mbit Flash memory. This is the main Flash memory. It is divided into eight
equal-sized blocks that can be accessed with user-specified addresses.
J
Internal secondary 256 Kbit Flash boot memory. It is divided into four equal-sized
blocks that can be accessed with user-specified addresses. This secondary memory
brings the ability to execute code and update the main Flash
concurrently.
J
64 Kbit SRAM. The SRAM’s contents can be protected from a power failure by
connecting an external battery.
J
General Purpose PLD (GPLD) with 24 outputs. The GPLD may be used to implement
external chip selects or combinatorial logic function.
J
Decode PLD (DPLD) that decodes address for selection of internal memory blocks.
J
52 individually configurable I/O port pins that can be used for the following functions:
MCU I/Os
PLD I/Os
Latched MCU address output
Special function I/Os.
I/O ports may be configured as open-drain outputs.
J
Standby current as low as 50 μA for 5 V devices.
J
Built-in JTAG compliant serial port allows full-chip In-System Programmability (ISP).
With it, you can program a blank device or reprogram a device in the factory or the field.
J
Internal page register that can be used to expand the microcontroller address space
by a factor of 256.
J
Internal programmable Power Management Unit (PMU) that supports a low power
mode called Power Down Mode. The PMU can automatically detect a lack of
microcontroller activity and put the PSD4000 into Power Down Mode.
J
Erase/Write cycles:
Flash memory – 100,000 minimum
PLD – 1,000 minimum
15 year data retention
2.0
Key Features
3
3.0 PSD4000
Series
Part #
Flash
Main
Memory
Kbit
8 Sectors
Flash
Serial ISP
JTAG/ISP
Port
Boot
Memory
Kbit
(4 Sectors)
PSD4000
Series
I/O
Pins
PLD
Inputs Macrocells Macrocells Outputs
Input
Output
PLD
SRAM
Kbit
Supply
Voltage
Device
PSD4000
PSD4135G2
PSD4235G2*
52
52
66
82
24
24
Yes
Yes
4096
4096
256
256
64
64
5V
5V
24
16
Table 1. PSD4000 Product Matrix
*
See PSD4235G2 Data Sheet.
相关PDF资料 |
PDF描述 |
|---|---|
| PSD413A1F | Field Programmable Microcontroller Peripherals with Flash Memory(可编程逻辑，16K位SRAM,35个可编程I/O,通用PLD有59个输入) |
| PSD413F | Field Programmable Microcontroller Peripherals with Flash Memory(可编程逻辑，16K位SRAM,35个可编程I/O,通用PLD有59个输入) |
| PSD413A2F | Field Programmable Microcontroller Peripherals with Flash Memory(可编程逻辑，16K位SRAM,35个可编程I/O,通用PLD有59个输入) |
| PSD4235G2(中文) | Flash In-System-Programmable Peripherals for 16-Bit MCUs(用于16位MCU的闪速在系统可编程外围芯片) |
| PSD4235G2 | Flash In-System-Programmable Peripherals for 16-Bit MCUs(用于16位MCU的闪速在系统可编程外围芯片) |
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