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| 型号： | PSD601E1 |
| 英文描述： | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可编程逻辑，4K位SRAM,26个可编程I/O,通用PLD有63个输入) |
| 中文描述： | 现场可编程微控制器外围设备和嵌入式微-细胞（可编程逻辑，4K的位的SRAM，26我个可编程输入/输出，通用PLD的有63个输入） |
| 文件页数： | 5/84页 |
| 文件大小： | 426K |
| 代理商： | PSD601E1 |
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PSD6XX Family
11-5
Pin Name
Pin
Type
Function Description
Reset
48
I
Active low input. Resets I/O Ports, PLD Micro
Cells and
some of the Configuration Registers. Must be active at
power up.
PA0
PA1
PA2
PA3
29
28
27
25
I/O
Port A, PA0 – 3. This port is pin configurable and has
multiple functions:
1. MCU I/O – standard output or input port
2. External chip select (ECSPLD) output, or input to GPLD
3. Latched address outputs (see Table 3)
4. As Address A0-3 inputs in 80C51XA mode
5. As Data Bus Port (D0–3) in non-multiplexed bus
configuration
6. Peripheral I/O mode
PA4
PA5
PA6
PA7
24
23
22
21
I/O
Port A, PA4–7. This port is pin configurable and has
multiple functions:
1. MCU I/O – standard output or input port
2. GPLD Micro
Cell (McellAB) output or input
3. Latched address outputs (see Table 3)
4. As Data Bus Port (D4–7) in non-multiplexed bus
configuration
5. Peripheral I/O mode
CMOS
or
Open
Drain
PB0
PB1
PB2
PB3
7
6
5
4
I/O
Port B, PB0–3. This port is pin configurable and has
multiple functions:
1. MCU I/O – standard output or input port
2. External chip select (ECSPLD) output, or input to GPLD
3. Latched address outputs (see Table 3)
4. As Data Bus Port (D8-11) in non-multiplexed bus
configuration with 16-bit data bus
PB4
PB5
PB6
PB7
3
2
I/O
Port B, PB4–7. This port is pin configurable and has multiple
functions:
1. MCU I/O – standard output or input port
2. GPLD Micro
Cell (McellAB) output or input
3. Latched address outputs (see Table 3)
4. As Data Bus Port (D12–15) in non-multiplexed bus
configuration with 16-bit data bus
CMOS
or
Open
Drain
52
51
PC0
PC1
PC3
PC4
PC5
PC6
PC7
(WRH)
20
19
17
14
13
12
11
I/O
Port C, PC0, PC1, PC3–7. This port is pin configurable and
has multiple functions:
1. MCU I/O – standard output or input port
2. GPLD Micro
Cell (McellC) output or input
3. PC7 pin only (WRH), Write strobe input for high byte.
Active low, for 16-bit MCU with WRH
CMOS
or
Open
Drain
PC2
(Vstby)
18
I
Port C pin PC2.
Dedicated SRAM Standby Voltage Input. Pin should be
grounded if Vstby is not required.
Table 2.
PSD6XXE1 Pin
Descriptions
(cont.)
相关PDF资料 |
PDF描述 |
|---|---|
| PSD602E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可编程逻辑，4K位SRAM,26个可编程I/O,通用PLD有63个输入) |
| PSD603E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可编程逻辑，4K位SRAM,26个可编程I/O,通用PLD有63个输入) |
| PSD612E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可编程逻辑，4K位SRAM,26个可编程I/O,通用PLD有63个输入) |
| PSD613E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可编程逻辑，4K位SRAM,26个可编程I/O,通用PLD有63个输入) |
| PSD703S5 | Field Programmable Microcontroller Peripherals with Supervisory Functions(可编程逻辑，4K位SRAM,27个可编程I/O,通用PLD有66个输入) |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD601E1-15L | 制造商:WSI 功能描述: |
| PSD601E1-70J | 制造商:WSI 功能描述: 制造商:WSI 功能描述:16K X 16 OTPROM, 26 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| PSD601E1-70L | 制造商:WSI 功能描述: |
| PSD602E1-70L | 制造商:WSI 功能描述: |
| PSD603E1-70L | 制造商:WSI 功能描述: |
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