参数资料
型号: PSD835G2V-A-15U
厂商: 意法半导体
英文描述: Configurable Memory System on a Chip for 8-Bit Microcontrollers
中文描述: 在8片位微控制器可配置存储系统
文件页数: 87/110页
文件大小: 570K
代理商: PSD835G2V-A-15U
PSD8XX Family
PSD835G2
86
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
CC
V
IH
V
IL
V
IH1
V
IL1
V
HYS
V
LKO
Supply Voltage
All Speeds
3.0
3.6
V
High Level Input Voltage
3.0 V < V
CC
< 3.6 V
3.0 V < V
CC
< 3.6 V
(Note 1)
.7 V
CC
–.5
V
CC
+.5
0.8
V
Low Level Input Voltage
V
Reset High Level Input Voltage
.8 V
CC
–.5
V
CC
+.5
.2 V
CC
–.1
V
Reset Low Level Input Voltage
(Note 1)
V
Reset Pin Hysteresis
0.3
V
V
CC
Min for Flash Erase and Program
1.5
2.3
V
V
OL
Output Low Voltage
I
OL
= 20 μA, V
CC
= 3.0 V
0.01
0.1
V
I
OL
= 4 mA, V
CC
= 3.0 V
I
OH
= –20 μA, V
CC
= 3.0 V
0.15
0.45
V
V
OH
Output High Voltage Except V
STBY
On
2.9
2.99
V
I
OH
= –1 mA, V
CC
= 3.0 V
I
OH1
= 1 μA
2.7
2.8
V
V
OH1
V
SBY
I
SBY
I
IDLE
V
DF
Output High Voltage V
STBY
On
SRAM Standby Voltage
V
SBY
– 0.8
2.0
V
V
CC
1
V
SRAM Standby Current (V
STBY
Pin)
Idle Current (V
STBY
Pin)
SRAM Data Retention Voltage
V
CC
= 0 V
V
CC
> V
SBY
Only on V
STBY
0.5
μA
–0.1
0.1
μA
2
V
I
SB
Standby Supply Current
for Power Down Mode
CSI >V
CC
–0.3 V
(Notes 2 and 3)
50
100
μA
I
LI
I
LO
Input Leakage Current
V
SS
< V
IN
< V
CC
0.45 < V
IN
< V
CC
–1
±.1
1
μA
Output Leakage Current
–10
±5
10
μA
I
O
Output Current
Refer to I
OL
and I
OH
in
the V
OL
and V
OH
row
ZPLD_TURBO = OFF,
f = 0 MHz (Note 3)
0
mA
PLD Only
ZPLD_TURBO = ON,
f = 0 MHz
I
CC
(DC)
(Note 5)
Operating
Supply Current
200
400
μA/PT
During FLASH
Write/Erase Only
FLASH
10
25
mA
Read Only, f = 0 MHz
0
0
mA
SRAM
f = 0 MHz
0
0
mA
PLD AC Base
(Note 4)
Figure 32a
I
CC
(AC)
(Note 5)
FLASH
AC Adder
1.5
2.0
mA/MHz
SRAM AC Adder
0.8
1.5
mA/MHz
PSD835G2 DC Characteristics
(3.0 V to 3.6 V Versions)
Advance Information
NOTES:
1.
Reset input has hysteresis. V
IL1
is valid at or below .2V
CC
–.1. V
IH1
is valid at or above .8V
CC
.
CSI deselected or internal PD mode is active.
PLD is in non-turbo mode and none of the inputs are switching.
Refer to Figure 31a for PLD current calculation.
I
O
= 0 mA.
2.
3.
4.
5.
相关PDF资料
PDF描述
PSD835G2V-A-15UI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-A-20B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-A-20B81I Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-A-20J Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD835G2V-A-20JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
相关代理商/技术参数
参数描述
PSD853F2-70J 功能描述:SPLD - 简单可编程逻辑器件 5.0V 1M 70ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24
PSD853F2-70M 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 70ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD853F2-90J 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD853F2-90JI 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100
PSD853F2-90M 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100