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参数资料
| 型号： | PTH12010LAST |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源模块 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封装： | DIP-10 |
| 文件页数： | 22/27页 |
| 文件大小： | 931K |
| 代理商： | PTH12010LAST |
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ELECTRICAL CHARACTERISTICS
SLTS205G – JUNE 2003 – REVISED FEBRUARY 2007
T
A = 25°C, VI = 12 V, VO = 1.8 V, CI = 560 F, CO = 0 F, and IO = IOmax (Unless otherwise stated)
PTH12010L
CHARACTERISTICS
CONDITIONS
MIN
TYP
MAX
UNIT
60
°C, 200 LFM airflow
0
12(1)
Io
Output current
0.8 V
≤ V
O≤ 1.8 V
A
25
°C, natural convection
0
12(1)
VI
Input voltage range
Over IO range
10.8
13.2
V
Vo tol
Set-point voltage tolerance
±2(2)
%Vo
Reg
temp
Temperature variation
–40 °C <TA < 85 °C
±0.5
%Vo
Reg
line
Line regulation
Over Vi range
±10
mV
Reg
load
Load regulation
Over IO range
±12
mV
Reg
tot
Total output variation
Includes set-point, line, load, –40
°C ≤ T
A≤ 85°C
±3(2)
%Vo
Vadj
Output voltage adjust range
Over VI range
0.8
1.8
V
RSET = 130 , Vo = 1.8V
89
RSET = 3.57 k, Vo = 1.5V
88
η
Efficiency
IO= 8 A
RSET = 12.1 k, Vo = 1.2V
86
%
RSET = 32.4 k, Vo = 1V
84
RSET = OPEN, Vo = 0.8V
82
Vr
VO ripple (peak-to-peak)
20 MHz bandwidth
All Vo
1
%VO
Io trip
Overcurrent threshold
Reset, followed by auto-recovery
20
A
ttr
1 A/s load step,
Recovery Time
70
Sec
Transient response
50 to100% Iomax,
VO over/undershoot
100
mV
V
tr
CO= 330 F
VOmargin
Margin up/down adjust
±5%
Margin Control
(pins 9 &10)
IILmargin
Margin input current, Pin to GND
–8(3)
A
IILtrack
Track input current (pin 8)
Pin to GND
–0.13(4)
mA
dVtrack/dt Track slew rate capability
CO≤ CO(max)
1
V/ms
VI increasing
9.5
10.4
UVLO
Undervoltage lockout
V
VI decreasing
8.8
9
VIH
Input high voltage, Referenced to GND
Open(4)
V
VIL
Inhibit control (pin 3)
Input low voltage, Referenced to GND
–0.2
0.5
IIL
Input low current, Pin 3 to GND
0.24
mA
II
Input standby current
Inhibit (pin 3) to GND, Track (pin 8) open
10
mA
fs
Switching frequency
Over VI and Io ranges
200
250
300
kHz
CI
External input capacitance
560(5)
F
nonceramic
0
330(6)
6,600(7)
Capacitance value
F
CO
External output capacitance
ceramic
0
300
Equivalent series resistance (nonceramic)
4(8)
m
MTBF
Reliability
Bellcore TR-332,50% stress,TA=40°C, GND benign
6.4
106 Hrs
(1)
See SOA curves or consult factory for appropriate derating.
(2)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/
°C (or better) temperature stability.
(3)
A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.
(4)
This control pin has an internal pull-up to the input voltage VI (7.5 V for pin 8). If it is left open-circuit the module operates when input
power is applied. A small, low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do
not place an external pull-up on this pin. For further information, see the related application section.
(5)
A 560
F electrolytic input capacitor, rated for a minimum of 800 mA rms of ripple current is required for proper operation.
(6)
External output capacitance is not required for operation. Adding 330
F of distributed capacitance improves the transient response.
(7)
This is the calculated maximum. The minimum ESR limitation oftens result in a lower value. When controlling the Track pin using a
voltage supervisor, CO(max) is reduced to 3300 F. See the application notes for further guidance.
(8)
This is the typical ESR for all nonceramic ouput capacitance. Use 7 m
as the minimum when using max-ESR values to calculate.
4
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