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参数资料
| 型号： | PUMA68E4001-20 |
| 元件分类： | PROM |
| 英文描述： | 128K X 32 EEPROM 5V MODULE, 200 ns, PQCC68 |
| 封装： | PLASTIC, LCC-68 |
| 文件页数： | 11/13页 |
| 文件大小： | 242K |
| 代理商： | PUMA68E4001-20 |
PUMA 68E4001/A-12/15/17/20
ISSUE 4.2 : November
1998
Device Operation
The following description deals with the PUMA 68E4001 device, with the references to WE meaning WE1~4
on the PUMA 68E4001A part.
Read
The PUMA 68E4001 read operations are initiated by both Output Enable and Chip Select LOW. The read operation
is terminated by either Chip Select or Output Enable returning HIGH. This 2-line control architecture eliminates
bus contention in a system environment. The data bus will be in a high impendence state when either Output Enable
or Chip Select is HIGH.
Write
Write operations are initiated when both Chip Select and Write Enable are LOW and Output Enable is HIGH. The
PUMA 68E4001 supports both a Chip Select and Write Enable controlled write cycle. That is, the address is latched
by the falling edge of either Chip Select or Write Enable, whichever occurs last. Similarly, the data is latched
internally by the rising edge of either Chip Select or Write Enable, whichever occurs first. A byte write operation,
once initiated, will automatically continue to completion, typically within 5 ms.
Page Mode Write
The page write feature of the PUMA 68E4001 allows the entire memory to be written in 5 seconds. Page Write
allows 128 bytes of data to be written prior to the internal programming cycle. The host can fetch data from another
location within the system during a page write operation (change the source address), but the page address (A8
through A16) for each subsequent valid write cycle to the part during this operation must be the same as the initial
page address.
The page write mode can be initiated during any write operation. Following the initial byte write cycle, the host can
write up to 128 bytes in the same manner as the first byte written. Each successive byte load cycle, started by
the Write Enable HIGH to LOW transition, must begin within 150 s of the falling edge of the preceding Write Enable.
If a subsequent Write Enable HIGH to LOW transition is not detected within 150 s, the internal automatic
programming cycle will commence.
DATA Polling
The PUMA 68E4001 features DATA Polling to indicate if the write cycle is completed. During the internal
programming cycle, any attempt to read the last byte written will produce the compliment of that data on D7. Once
the programming is complete, D7 will reflect the true data. Note: If the the PUMA 68E4001 is in a protected state
and an illegal write operation is attempted DATA Polling will not operate.
TOGGLE bit
In addition to DATA polling, another method is provided to determine the end of a Write Cycle. During a write
operation successive attempts to read data will result in D6 toggling between 1 and 0. Once a write is complete,
this toggling will stop and valid data will be read.
Hardware Data Protection
The PUMA 68E4001 provides three hardware features to protect non-volalitile data from inadvertent writes.
Noise Protection - A Write Enable pulse less than 15 ns will not initiate a write cycle.
Default V
CC Sence - All functions are inhibited when VCC < 3.6 V.
Write Inhibit - Holding either Output Enable LOW, Write Enable HIGH or Chip Select HIGH will prevent an
inadvertent write cycle during power on or power off, maintaining data integrity.
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PDF描述 |
|---|---|
| PUMA68F32006M-90E | 1M X 32 FLASH 5V PROM MODULE, 90 ns, PQMA68 |
| PUMA68F4001MB-15 | 128K X 32 FLASH 5V PROM MODULE, 150 ns, PQMA68 |
| PUMA68S16000XBL-012 | 512K X 32 MULTI DEVICE SRAM MODULE, 12 ns, PQCC68 |
| PUMA68SV16000B-020 | 512K X 32 MULTI DEVICE SRAM MODULE, 20 ns, PQMA68 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PUMA68E4001-20E | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x32 EEPROM Module |
| PUMA68E4001A-12 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x32 EEPROM Module |
| PUMA68E4001A-12E | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x32 EEPROM Module |
| PUMA68E4001A-15 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:EEPROM|128KX32|CMOS|LDCC|68PIN|PLASTIC |
| PUMA68E4001A-15E | 制造商:未知厂家 制造商全称:未知厂家 功能描述:x32 EEPROM Module |
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