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| 型号： | R1224N142E-TR |
| 英文描述： | Analog IC |
| 中文描述： | 模拟IC |
| 文件页数： | 7/36页 |
| 文件大小： | 503K |
| 代理商： | R1224N142E-TR |
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Rev. 1.12 - 7 -
are the typical characteristics of the IC with PWM/VFM alternative circuit.
The performance of power source circuits using these ICs extremely depends upon the peripheral circuits.
Pay attention in the selection of the peripheral circuits. In particular, design the peripheral circuits in a way that the
values such as voltage, current, and power of each component, PCB patterns and the IC do not exceed their
respected rated values.
I
How to Adjust Output Voltage and about Phase Compensation
As for Adjustable Output type, feedback pin (V
FB
) voltage is controlled to maintain 1.0V.
Output Voltage, V
OUT
is as following equation:
V
OUT
: R2+R4=V
FB
: R2
V
OUT
=V
FB
×
(R2+R4)/R2
Thus, with changing the value of R2 and R4, output voltage can be set in the specified range.
In the DC/DC converter, with the load current and external components such as L and C, phase might be behind 180
degree. In this case, the phase margin of the system will be less and stability will be worse. To prevent this, phase
margin should be secured with proceeding the phase. A pole is formed with external components L and C3.
Fpole
～
1/2
π√
L
×
C3
A zero (signal back to zero) is formed with R4 and C4.
Fzero
～
1/(2
π×
R4
×
C4)
For example, if L=27
μ
H, C3=47
μ
F, the cut off frequency of the pole is approximately 4.5kHz.
To make the cut off frequency of the pole as much as 4.5kHz, set R4=33k
and C4=1000pF.
If V
OUT
is set at 2.5V, R2=22k
is appropriate.
R3 prevents feedback of the noise to V
FB
pin, about 2.7k
is appropriate value.
C3
C2
L
C1
R1
SD
V
FB
V
IN
CE
CE CONTROL
LOAD
EXT
GND
C4
R2
R4
R3
PMOS
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