参数资料
型号: R1LP0408C-C
厂商: Renesas Technology Corp.
英文描述: 4M SRAM (512-kword 】 8-bit)
中文描述: 4分的SRAM(512 - KWord的】8位)
文件页数: 4/14页
文件大小: 94K
代理商: R1LP0408C-C
R1LP0408C-C Series
Rev.2.00, May.26.2004, page 12 of 12
Low VCC Data Retention Characteristics
(Ta =
20 to +70°C)
Parameter
Symbol
Min Typ
Max Unit Test conditions*
3
VCC for data retention
VDR
2
V
CS#
≥ VCC 0.2 V, Vin ≥ 0 V
to +70
°C
ICCDR
8
A
VCC = 3.0 V, Vin
≥ 0 V
to +40
°C
ICCDR
1.0*
2
3
A
CS#
≥ VCC 0.2 V
5SC
to +25
°C
ICCDR
0.8*
1
3
A
to +70
°C
ICCDR
16
A
to +40
°C
ICCDR
1.0*
2
10
A
Data
retention
current
7LC
to +25
°C
ICCDR
0.8*
1
10
A
Chip deselect to data retention time
tCDR
0
ns
See retention waveform
Operation recovery time
tR
tRC*
4
ns
Notes: 1. Typical values are at VCC = 3.0 V, Ta = +25
°C and specified loading, and not guaranteed.
2. Typical values are at VCC = 3.0 V, Ta = +40
°C and specified loading, and not guaranteed.
3. CS# controls address buffer, WE# buffer, OE# buffer, and Din buffer. In data retention mode,
Vin levels (address, WE#, OE#, I/O) can be in the high impedance state.
4. tRC = read cycle time.
Low VCC Data Retention Timing Waveform (CS# Controlled)
V
CC
4.5 V
2.2 V
0 V
CS#
t
CDR
t
R
CS#
≥ V
CC – 0.2 V
V
DR
Data retention mode
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