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参数资料
| 型号： | R5109G391A-TR-F |
| 厂商： | RICOH COMPANY LTD |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封装： | LEAD FREE, SSOP-8 |
| 文件页数： | 1/2页 |
| 文件大小： | 286K |
| 代理商： | R5109G391A-TR-F |
R5109G Series
Watchdog Timer Equipped with 2-Clock Monitoring with VD
No.EK-172-091101
CMOS Microprocessor Supervisory
The R5109G Series are CMOS-based system power ICs with a voltage detector (VD) and watchdog timer (WDT) integrated in a single chip.
R5109G monitors the power system of devices equipped with microprocessors and prevents system runaway with a reset signal when a
malfunction occurs. The output delay time of the VD and watchdog timeout period/reset time can be adjusted with an external capacitor
with a high degree of accuracy. R5109G is equipped with the function that inhibits clock monitoring of the WDT (INH) and the function to
supervise two different clocks.
FEATURES
Supply Current (I
SS
) Typ. 11.5
μA (VDD=-VDET+0.5V,
Clock pulse input)
Operating Voltage Range (V
DD
) 0.9V to 6.0V
(VD Section)
Detector Threshold Range (-V
DET
) 1.5V to 5.5V (internally fixed)
Detector Threshold Accuracy ± 1%
Temp. coeff. of Detector Threshold Typ. ± 100ppm/°C
Output Delay Time (t
PLH
) Typ. 370ms (CD=0.1
μF)
Output Delay Time Accuracy± 16% (-40°C <= Topt <= 105°C)
(WDT Section)
Watchdog Timeout Period (t
WD
) Typ. 310ms (CTW=0.1
μF)
Reset Hold Time of WDT (t
WR
) Typ. 34ms (CTW=0.1
μF)
Watchdog Timeout Period Accuracy ± 33% (-40°C <= Topt <= 105°C)
Package SSOP-8G
(The above shows specification at Topt=25°C. Design assurance value at -40°C <
= Topt <
= 105°C is also available. For details, please refer to the datasheet.)
BLOCK DIAGRAMS
TYPICAL APPLICATION
R5109Gxx1A
(Nch. open drain output)
VDD
GND
SCK1
CTW
WATCHDOG
TIMER
CLOCK
DETECTOR
RESETB
INH
CD
Vref1
Vref2
SCK2
CLOCK
DETECTOR
R5109Gxx1C
(CMOS output)
VDD
GND
SCK1
CTW
WATCHDOG
TIMER
CLOCK
DETECTOR
RESETB
INH
CD
Vref1
Vref2
SCK2
CLOCK
DETECTOR
R5109Gxx1A
Series
CD
VDD
RESET
I/O
R
CTW
GND
VDD
CD
RESETB
SCK2
CTW
1
7
4
3
8
2
Microprocessor 1
Power Supply
5
6
SW
INH
SCK1
VDD
RESET
I/O
Microprocessor 2
SELECTION GUIDE
Package
Quantity per Reel
Part No.
SSOP-8G
3,000 pcs
R5109G.xx.1.
-TR-F
.xx. : Specify the detector threshold within the range 1.5V (.15.) to 5.5V (.55.)
in 0.1V steps.
. : Select the output type from (.A.) Nch. open drain or (.C.) CMOS.
PACKAGE (Top View)
TIMING CHART
SSOP-8G
1
8
2
7
3
6
4
5
1
RESETB
Output pin for Reset "L" signal
2
INH
Inhibit pin
3
CD
Ext. Cap. pin for setting output
delay time of VD
4
GND
Ground pin
5
SCK1
Watchdog timer clock input pin 1
6
SCK2
Watchdog timer clock input pin 2
7
CTW
Ext. Cap. pin for setting reset and
watchdog timeout period of WDT
8
VDD
Power supply pin
APPLICATION
Monitoring of the power system of devices equipped with microprocessors
-VDET
+VDET
VRESETB
VCTW
VSCK1
VDD
Vref2H
Vref2L
VINH
tWD
VSCK2
VCD
-VTCD
tWDI
tPLH
tWR
tPLH
tPHL
+VTCD
tPLH
tPHL : Output delay time
tWDI : tWD/10 (SCK pulses input during this period are ignored.)
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