参数资料
型号: R5F21284SNXXXSP
厂商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 16-BIT CMOS MCU
中文描述: 单片16位CMOS微控制器
文件页数: 12/71页
文件大小: 552K
代理商: R5F21284SNXXXSP
R8C/28 Group, R8C/29 Group
2. Central Processing Unit (CPU)
Rev.1.10
REJ03B0169-0110
May 17, 2007
Page 12 of 67
2.8.7
Interrupt Enable Flag (I)
The I flag enables maskable interrupts.
Interrupt are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0
when an interrupt request is acknowledged.
2.8.8
Stack Pointer Select Flag (U)
ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software
interrupt numbers 0 to 31 is executed.
2.8.9
Processor Interrupt Priority Level (IPL)
IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has higher priority than IPL, the interrupt is enabled.
2.8.10
Reserved Bit
If necessary, set to 0. When read, the content is undefined.
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