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参数资料
| 型号： | R5F21386CDFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件页数： | 4/57页 |
| 文件大小： | 529K |
| 代理商： | R5F21386CDFP |
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R8C/38C Group
2. Central Processing Unit (CPU)
REJ03B0295-0100 Rev.1.00
Page 12 of 54
Apr 23, 2010
2.1
Data Registers (R0, R1, R2, and R3)
R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 to R3. R0 can be split
into high-order bits (R0H) and low-order bits (R0L) to be used separately as 8-bit data registers. R1H and R1L are
analogous to R0H and R0L. R2 can be combined with R0 and used as a 32-bit data register (R2R0). R3R1 is
analogous to R2R0.
2.2
Address Registers (A0 and A1)
A0 is a 16-bit register for address register indirect addressing and address register relative addressing. It is also
used for transfer, arithmetic, and logic operations. A1 is analogous to A0. A1 can be combined with A0 and as a 32-
bit address register (A1A0).
2.3
Frame Base Register (FB)
FB is a 16-bit register for FB relative addressing.
2.4
Interrupt Table Register (INTB)
INTB is a 20-bit register that indicates the starting address of an interrupt vector table.
2.5
Program Counter (PC)
PC is 20 bits wide and indicates the address of the next instruction to be executed.
2.6
User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
The stack pointers (SP), USP and ISP, are each 16 bits wide. The U flag of FLG is used to switch between
USP and ISP.
2.7
Static Base Register (SB)
SB is a 16-bit register for SB relative addressing.
2.8
Flag Register (FLG)
FLG is an 11-bit register indicating the CPU state.
2.8.1
Carry Flag (C)
The C flag retains carry, borrow, or shift-out bits that have been generated by the arithmetic and logic unit.
2.8.2
Debug Flag (D)
The D flag is for debugging only. Set it to 0.
2.8.3
Zero Flag (Z)
The Z flag is set to 1 when an arithmetic operation results in 0; otherwise to 0.
2.8.4
Sign Flag (S)
The S flag is set to 1 when an arithmetic operation results in a negative value; otherwise to 0.
2.8.5
Register Bank Select Flag (B)
Register bank 0 is selected when the B flag is 0. Register bank 1 is selected when this flag is set to 1.
2.8.6
Overflow Flag (O)
The O flag is set to 1 when an operation results in an overflow; otherwise to 0.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| R5F21386CDFP#U0 | 制造商:Renesas Electronics Corporation 功能描述:R8C38C 32+4KB 1.8/5.5V -40 85C 80LQFP - Trays |
| R5F21386CNFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F21386CNFP#U0 | 制造商:Renesas Electronics Corporation 功能描述:R8C38C 32+4KB 1.8/5.5V -20 85C 80LQFP - Trays |
| R5F21386CNFP#V0 | 功能描述:MCU 1KB FLASH 32KB ROM 80-LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/3x/38C 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
| R5F21386MDFD | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:The R8C/38M Group has data flash (1 KB × 4 blocks) with the background operation |
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