5. Electrical Characteristics
REJ03B0243-0030 Rev.0.30
Jan 21, 2009
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
Notes:
1.
Definition of programming/erasure endurance
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 10,000), each block can be erased n times. For example, if 1,024 1-byte
writes are performed to different addresses in block A, a 1 Kbyte block, and then the block is erased, the
programming/erasure endurance still stands at one.
However, the same address must not be programmed more than once per erase operation (overwriting prohibited).
2.
Endurance to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
3.
In a system that executes multiple programming operations, the actual erasure count can be reduced by writing to sequential
addresses in turn so that as much of the block as possible is used up before performing an erase operation. For example,
when programming groups of 16 bytes, the effective number of rewrites can be minimized by programming up to 128 groups
before erasing them all in one operation. In addition, averaging the erasure endurance between blocks A to D can further
reduce the actual erasure endurance. It is also advisable to retain data on the erasure endurance of each block and limit the
number of erase operations to a certain number.
4.
If an error occurs during block erase, attempt to execute the clear status register command, then execute the block erase
command at least three times until the erase error does not occur.
5.
Customers desiring program/erase failure rate information should contact their Renesas technical support representative.
6.
40°C for D version.
7.
The data hold time includes time that the power supply is off or the clock is not supplied.
Figure 5.2
Time delay until Suspend
Table 5.8
Flash Memory (Data flash Block A to Block D) Characteristics
(VCC = 2.7 to 5.5 V and Topr =
20 to 85°C (N version) / 40 to 85°C (D version), unless
otherwise specified.)
Symbol
Parameter
Conditions
Standard
Unit
Min.
Typ.
Max.
Program/erase endurance
(1)times
Byte program time
(program/erase endurance
≤ 1,000 times)
160
TBD
s
Byte program time
(program/erase endurance
> 1,000 times)
300
s
Block erase time
(program/erase endurance
≤ 1,000 times)
0.2
s
Block erase time
(program/erase endurance
> 1,000 times)
0.3
s
td(SR-SUS)
Time delay from suspend request until
suspend
5 + CPU clock
× 3 cycles
ms
Interval from erase start/restart until
following suspend request
0
s
Suspend interval necessary for auto-
erasure to complete
33
ms
Time from suspend until erase restart
30 + CPU clock
× 1 cycle
s
Program, erase voltage
2.7
5.5
V
Read voltage
1.8
5.5
V
Program, erase temperature
85
°C
Ambient temperature = 55
°C20
year
FST6 bit
Suspend request
(FMR21 bit)
Fixed time
td(SR-SUS)
Clock-dependent
time
Access restart
FST6: Bit in FST register
FMR21: Bit in FMR2 register