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参数资料
| 型号： | R5F35630JFF |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | PLASTIC, LQFP-64 |
| 文件页数： | 14/25页 |
| 文件大小： | 309K |
| 代理商： | R5F35630JFF |
Page 21 of 23
2. Central Processing Unit (CPU)
2.1
General Purpose Registers
2.1.1
Data Registers (R0, R1, R2, and R3)
The R0, R1, R2, and R3 are 16-bit registers used for transfer, arithmetic and logic operations. R0 and
R1 can be split into high-order (R0H/R1H) and low-order bits (R0L/R1L) to be used separately as 8-bit
data registers. R0 can be combined with R2 and used as a 32-bit data register (R2R0). The same
applies to R3R1.
2.1.2
Address Registers (A0 and A1)
A0 and A1 are 16-bit registers used for indirect addressing, relative addressing, transfer, arithmetic and
logic operations. A0 can be combined with A1 and used as a 32-bit address register (A1A0).
2.1.3
Frame Base Register (FB)
FB is a 16-bit register used for FB relative addressing.
2.1.4
Interrupt Table Register (INTB)
INTB is a 20-bit register that indicates the start address of a relocatable interrupt vector table.
2.1.5
Program Counter (PC)
PC is a 20-bit register that indicates the address of the next instruction to be executed.
2.1.6
User Stack Pointer (USP) and Interrupt Stack Pointer (ISP)
The stack pointers (SP), USP and ISP, each have 16 bits. The U flag is used to switch between USP
and ISP.
2.1.7
Static Base Register (SB)
SB is a 16-bit register used for SB-relative addressing.
2.1.8
Flag Register (FLG)
FLG is a 11-bit register that indicates the CPU state.
2.1.8.1
Carry Flag (C Flag)
The C flag retains a carry, borrow, or shift-out bit that has been generated by the arithmetic/logic unit.
2.1.8.2
Debug Flag (D Flag)
The D flag is for debugging purpose only. Set it to 0.
2.1.8.3
Zero Flag (Z Flag)
The Z flag is set to 1 when an arithmetic operation results in 0; otherwise to 0.
2.1.8.4
Sign Flag (S Flag)
The S flag is set to 1 when an arithmetic operation results in a negative value; otherwise to 0.
2.1.8.5
Register Bank Select Flag (B Flag)
Register bank 0 is selected when the B flag is set to 0. Register bank 1 is selected when this flag is set to 1.
2.1.8.6
Overflow Flag (O Flag)
The O flag is set to 1 when an arithmetic operation results in an overflow; otherwise to 0.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| R5F35630KFF | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F35633DFF | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F35633JFF | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F35633KFF | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F35636DFF | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:RENESAS MCU |
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