
R01UH0218EJ0110 Rev.1.10
Page 132 of 664
Sep 12, 2011
R32C/142 Group and R32C/145 Group
7. Clock Generator
7.7.3
Stop Mode
In stop mode, all of the clocks, except for those that are protected, stop running. That is, the CPU and
peripheral functions, operated by the CPU clock and peripheral clock, also stop. This mode saves the
most power.
7.7.3.1
Entering Stop Mode
To enter stop mode, the following procedures should be done before the STOP instruction is executed.
Initial setting
Set the wake-up interrupt priority level (bits RLVL2 to RLVL0 in registers RIPL1 and RIPL2) to 7.
Then set each interrupt request level.
Steps before entering stop mode
(1) Set the I flag to 0.
(2) Set the interrupt request level for each interrupt source (interrupt number from 1 to 127) to 0, if
the interrupt request level is not 0.
(3) Perform a dummy read of any of the interrupt control registers.
(4) Set the processor interrupt priority level (IPL) in the flag register to 0.
(5) Enable interrupts temporarily by executing the following instructions:
FSET I
NOP
FCLR I
(6) Set the interrupt request level for the interrupt to exit stop mode.
Do not rewrite the interrupt control register after this step.
(7) Set the IPL in the flag register.
(8) Set the interrupt priority level for resuming to the same level as the IPL.
Interrupt request level for the interrupt to exit stop mode > IPL = Interrupt priority level for
resuming
(9) Set the CM20 bit in the CM2 register to 0 (oscillator stop detection disabled) when the oscillator
stop detection is used.
(10)Change the base clock to either the main clock divided by 256 (f256) or the on-chip oscillator
clock divided by 4 (fOCO4).
(11)Set the I flag to 1.
(12)Execute the STOP instruction.
After exiting stop mode
Set the wake-up interrupt priority level to 7 immediately after exiting stop mode.