参数资料
型号: RDC-19222-303Q
厂商: DATA DEVICE CORP
元件分类: 位置变换器
英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQCC44
文件页数: 19/24页
文件大小: 256K
代理商: RDC-19222-303Q
4
Data Device Corporation
www.ddc-web.com
RDC-19220 SERIES
L-11/02-300
THEORY OF OPERATION
The RDC-19220 Series of converters are single CMOS custom
monolithic chips. They are implemented using the latest IC tech-
nology which merges precision analog circuitry with digital logic
to form a complete, high-performance tracking resolver-to-digital
converter. For user flexibility and convenience, the converter
bandwidth, dynamics and velocity scaling are externally set with
passive components.
FIGURE 1 is the functional block diagram of the RDC-19220
Series. The converter operates with ±5 Vdc power supplies.
Analog signals are referenced to analog ground, which is at
ground potential. The converter is made up of two main sections;
a converter and a digital interface. The converter front-end con-
sists of sine and cosine differential input amplifiers. These inputs
are protected to ±25 V with 2 k
resistors and diode clamps to
the ±5 Vdc supplies. These amplifiers feed the high accuracy
Control Transformer (CT). Its other input is the 16-bit digital angle
φ. Its output is an analog error angle, or difference angle,
between the two inputs. The CT performs the ratiometric trigono-
metric computation of SIN
θCOSφ - COSθSINφ = SIN(θ-φ) using
amplifiers, switches, logic and capacitors in precision ratios.
Note: The transfer function of the CT is normally trigonometric,
but in LDVT mode the transfer function is triangular (linear)
and could thereby convert any linear transducer output.
The converter accuracy is limited by the precision of the com-
puting elements in the CT. In these converters, ratioed capacitors
are used in the CT instead of the more conventional precision
ratioed resistors. Capacitors, used as computing elements with
op-amps, need to be sampled to eliminate voltage drifting.
Therefore, the circuits are sampled at a high rate (67 kHz) to
eliminate this drifting and at the same time to cancel out the op-
amp offsets.
The error processing is performed using the industry standard
technique for type II tracking R/D converters. The dc error is inte-
grated yielding a velocity voltage which in turn drives a voltage
controlled oscillator (VCO). This VCO is an incremental integra-
tor (constant voltage input to position rate output) which togeth-
er with the velocity integrator forms a type II servo feedback loop.
A lead in the frequency response is introduced to stabilize the
loop and another lag at higher frequency is introduced to reduce
the gain and ripple at the carrier frequency and above. The set-
tings of the various error processor gains and break frequencies
are done with external resistors and capacitors so that the con-
verter loop dynamics can be easily controlled by the user.
GAIN
11 mV/LSB
16 BIT
UP/DOWN
COUNTER
R1
VCO
RV
RB CBW
C
/10
BW
VEL
-VCO
H = 1
-VSUM
VEL
C F
S S
CT
+
-
RESOLVER
INPUT
(
θ)
RS
50 pf
CVCO
DIGITAL
OUTPUT
(
φ)
DEMOD
±1.25 V
THRESHOLD
1
FIGURE 2. TRANSFER FUNCTION BLOCK DIAGRAM #1
TABLE 2. DIGITAL ANGLE OUTPUTS
BIT
DEG/BIT
MIN/BIT
1(MSB)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
180
90
45
22.5
11.25
5.625
2.813
1.405
0.7031
0.3516
0.1758
0.0879
0.0439
0.0220
0.0110
0.0055
10800
5400
2700
1350
675
337.5
168.75
84.38
42.19
21.09
10.55
5.27
2.64
1.32
0.66
0.33
Note: EM enables the MSBs and EL enables the LSBs.
TRANSFER FUNCTION AND BODE PLOT
The dynamic performance of the converter can be determined from
its Transfer Function Block Diagrams and its Bode Plots (open and
closed loop). These are shown in FIGURES 2, 3, and 4.
The open loop transfer function is as follows:
where A is the gain coefficient and A2= A1A2
and B is the frequency of lead compensation.
2
S
A
+1
(
)
B
2
S
+1
(
)
10B
Open Loop Transfer Function =
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