- 您现在的位置：买卖IC网 > PDF目录230914 > RDC-19222S-172T (DATA DEVICE CORP) SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CQCC44 PDF资料下载
参数资料
| 型号： | RDC-19222S-172T |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 位置变换器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CQCC44 |
| 文件页数： | 16/20页 |
| 文件大小： | 276K |
| 代理商： | RDC-19222S-172T |
5
Data Device Corporation
www.ddc-web.com
RDC-19220/2S
E-11/02-300
GENERAL SETUP CONDITIONS
DDC has external component selection software which consid-
ers all the criteria below and, in a simple fashion, asks the key
parameters (carrier frequency, resolution, bandwidth, and track-
ing rate) to derive the external component values.
The following recommendations should be considered when
installing the RDC-19220/2S R/D converter:
1) When setting the bandwidth (BW) and Tracking Rate (TR)
(selecting five external components), the system requirements
need to be considered. For the greatest noise immunity, select
the minimum BW and TR the system will allow.
2) Power supplies are ±5V DC. For lowest noise performance it
is recommended that a 0.1F or larger cap be connected from
each supply to ground near the converter package.
3) Resolver inputs and velocity output are referenced to AGND.
This pin should be connected to GND near the converter pack-
age. Digital currents flowing through ground will not disturb the
analog signals.
4) The BIT output, which is active low, is activated by an error of
approximately 100 LSBs. During normal operation, for step
inputs or on power up, a large error can exist.
ERROR PROCESSOR
RESOLVER
INPUT
(
θ)
VELOCITY
OUT
DIGITAL
POSITION
OUT (
φ)
VCO
CT
S
A
+ 1
1
B
S
+ 1
10B
H = 1
+
-
e
A2
S
-12
db/oct
BA
2A
-6 db/oct
10B
ω (rad/sec)
2A
2 2 A
ω (rad/sec)
f
= BW (Hz) =
BW
2 A
π
CLOSED LOOP
(B = A/2)
GAIN = 0.4
GAIN = 4
(CRITICALLY DAMPED)
OPEN LOOP
FIGURE 3. TRANSFER FUNCTION
BLOCK DIAGRAM #2
FIGURE 4. BODE PLOTS
TABLE 2. TRACKING/BW RELATIONSHIP
RPS (MAX)/BW
RESOLUTION
1
10
0.50
12
0.25
14
0.125
16
5) Setup of bandwidth and velocity scaling for the optimized crit-
ically damped case should proceed as follows:
6) Selecting a fBW that is too low relative to the maximum appli-
cation tracking rate can create a spin-around condition in which
the converter never settles. The relationship to insure against
spin-around is as follows (TABLE 2.):
- Select the desired f
BW (closed loop), based on overall
system dynamics.
- Select fcarrier
≥ 3.5 f
BW
- Compute R
v = 55 k x
{
}
Application max rate
- Compute C
BW
(pF) =
3.2 x F
S
(Hz) x 10
8
R
V x (fBW)
2
- Where FS = 70 kHz for R
S = 30 k
100 kHz for R
S = 20 k
125 kHz for R
S = 15 k
- Compute R
B =
0.9
C
BW x fBW
- Compute CBW
10
For the converter max tracking rate value,
see the row indicated in TABLE 3.
相关PDF资料 |
PDF描述 |
|---|---|
| RD-14592F1-235Q | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDMA36 |
| RD-14592F1-242 | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDMA36 |
| RD-14592F1-255 | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDMA36 |
| RD-14590F1-844L | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDMA36 |
| RD-14592F1-572 | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDMA36 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RDC-19222S-202 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LVDT/Resolver-to-Digital Converter |
| RDC-19222S-202T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LVDT/Resolver-to-Digital Converter |
| RDC-19222S-203 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LVDT/Resolver-to-Digital Converter |
| RDC-19222S-203T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LVDT/Resolver-to-Digital Converter |
| RDC-19222S-212T | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Converter |
发布紧急采购，3分钟左右您将得到回复。