参数资料
型号: RFPIC12F675F-I/SS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO20
封装: 0.209 INCH, PLASTIC, MO-150, SSOP-20
文件页数: 57/123页
文件大小: 5438K
代理商: RFPIC12F675F-I/SS
2003 Microchip Technology Inc.
Preliminary
DS70091A-page 37
rfPIC12F675
6.5
Comparator Reference
The comparator module also allows the selection of an
internally generated voltage reference for one of the
comparator inputs. The internal reference signal is
used for four of the eight Comparator modes. The
VRCON register, Register 6-2, controls the voltage
reference module shown in Figure 6-5.
6.5.1
CONFIGURING THE VOLTAGE
REFERENCE
The voltage reference can output 32 distinct voltage
levels, 16 in a high range and 16 in a low range.
The following equations determine the output voltages:
6.5.2
VOLTAGE REFERENCE
ACCURACY/ERROR
The full range of V
SS to VDD cannot be realized due to
the construction of the module. The transistors on the
top and bottom of the resistor ladder network
REF from approaching VSS or
V
DD. The Voltage Reference is VDD derived and there-
fore, the CVREF output changes with fluctuations in
VDD. The tested absolute accuracy of the Comparator
Voltage Reference can be found in Section 13.0.
FIGURE 6-5:
COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
6.6
Comparator Response Time
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output is ensured to have a valid level. If
the internal reference is changed, the maximum delay
of the internal voltage reference must be considered
when using the comparator outputs. Otherwise, the
maximum delay of the comparators should be used
6.7
Operation During SLEEP
Both the comparator and voltage reference, if enabled
before entering SLEEP mode, remain active during
SLEEP. This results in higher SLEEP currents than
shown
in
the
power-down
specifications.
The
additional current consumed by the comparator and the
voltage reference is shown separately in the specifica-
tions. To minimize power consumption while in SLEEP
mode, turn off the comparator, CM2:CM0 = 111, and
voltage reference, VRCON<7> = 0.
While the comparator is enabled during SLEEP, an
interrupt will wake-up the device. If the device wakes
up from SLEEP, the contents of the CMCON and
VRCON registers are not affected.
6.8
Effects of a RESET
A device RESET forces the CMCON and VRCON
registers to their RESET states. This forces the
comparator module to be in the Comparator Reset
mode, CM2:CM0 = 000 and the voltage reference to its
off state. Thus, all potential inputs are analog inputs
with the comparator and voltage reference disabled to
consume the smallest current possible.
VRR = 1 (low range): CV
REF = (VR3:VR0 / 24) x VDD
VRR = 0 (high range): CV
REF = (VDD / 4) + (VR3:VR0 x
V
DD / 32)
VRR
8R
VR3:VR0
16-1 Analog
8R
R
CV
REF to
16 Stages
Comparator
Input
VREN
V
DD
MUX
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