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参数资料
| 型号： | RTC-72423B-0 |
| 厂商： | EPSON TOYOCOM CORP |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | REAL TIME CLOCK, PDSO24 |
| 封装： | SOP-24 |
| 文件页数： | 24/26页 |
| 文件大小： | 192K |
| 代理商： | RTC-72423B-0 |
RTC - 72421 / 72423
Page - 3
MQ162-04
! Terminal functions
Pin No.
Signal
RTC-72421
RTC-72423
Input/ou
tput
Function
D0-D3
(Data bus)
11
14
16, 19
Bi-
direction
Connect these pines to a bi-directional data bus or CPU data bus. Use this bus
to read to and write from the internal counter and registers.
CS1 CS0
RD
WR
Mode of D0 to D3
H
L
H
Output mode (read mode)
H
L
H
L
Input mode (write mode)
H
L
Do not use
L
H or L
High impedance (back-up mode)
H
H or L
High impedance (RTC not selected)
A0-A3
(Address bus)
4
7
5, 7, 9, 10
Input
Address input pins used for connection to CPU address, etc. Used to select the
RTC’s internal counter and registers (address selection).
When the RTC is connected to a multiplexed-bus type of CPU, these pines can
also be used in combination with the ALE described below
ALE
(Address Latch Enable)
3
4
Input
Reads in address data and
CS0
state for internal latching.
When the ALE is high, the address data and
CS0
state is read into the RTC.
When the (through-mode) ALE falls, the address data and
CS0
state at that
point are held. The held address data and
CS0
status are maintained while
the ALE is low.
ALE
Address data and CS0 status
H
L
Read into the RTC to set address data
Held in the RTC (latched at the trailing edge of the ALE)
If the RTC is connected to a CPU that does not have an ALE pin and thus there
is no need to use this ALE pin, fix it to VDD.
WR
(WRite)
10
13
Input
Writes the data on D0 to D3 into the register of the address specified by A0 to
A3, at the leading edge of
WR .
Make sure that
RD
and
WR
are never low at the same time.
RD
(ReaD)
8
11
Input
Output data to D0 to D3 from the register at the address specified by A0 to A3,
while
RD
is
low.
Make sure that
RD
and
WR
are never low at the same time.
CS1, CS0
(Chip Select)
15,2
20,2
Input
When CS1 is high and
CS0
is low, the RTC’s chip-select function is valid and
read and write are enabled.
When the RTC is connected to a multiplexed-bus type of CPU,
CS0
requires
the operation of the ALE (see the description of the ALE).
Use CS1 connected to a power voltage detection circuit. When CS1 is high, the
RTC is enabled; when it is low, the RTC is on standby.
When CS1 goes low, the HOLD and RESET bits in the RTC registers are
cleared to 0.
STD.P
(STanDard Pulse)
1
Output
This is an N-channel open drain output pin.
Depending on the setting of the CE register, a fixed-period interrupt signal and a
pulse signal are output.
The output from this pin cannot be inhibited by the CS1 and
CS0
signals.
Use a load voltage that is less than or equal to VDD. If not using this pin, keep it
open-circuit.
An example of STD.P connection is shown below.
At least 2.2 k
STD.P
RTC
+5 V or VDD
If the STD.P output is not be used during standby operation, connecting the pull-
up resister to +5 V provides a reduction in current consumption. If the STD.P
output is to be used even during standby, connect the pull-up resistor to the
RTC’s VDD. In this case, the current consumption will be increased by the
amount of current flowing through the pull-up resistor.
VDD
18
24
Connect this pin to power source. Supply to 5 V
± 10 % to this pin during normal
operation; at least 2 V during battery back-up operation.
GND
9
12
Connect this pin to ground.
(VDD)
16, 17
22,23
These pins are connected internally to VDD. Leave them open circuit.
N.C.
3, 6, 8,
17, 18, 21
These pins are not connected internally. Ground them.
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