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参数资料
| 型号： | RV5VE001S-E1 |
| 厂商： | RICOH COMPANY LTD |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PDSO16 |
| 封装： | 0.65 MM PITCH, SSOP-16 |
| 文件页数： | 13/49页 |
| 文件大小： | 321K |
| 代理商： | RV5VE001S-E1 |
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19
Detector 2
CD
Current Source
Vref
Ra
Rb
Rc
Tr.1
Tr.2
Rb
Output Capacitor
GND
VDD
RESET
VSEN2
+
–
Operation Diagram
A
B
Minimum Operating Voltage
GND
Output Voltage
Step
1
2
3
4
5
Delay Time
Detector Threshold Hysteresis
Released Voltage +VDET
Detected Voltage –VDET
I
.
Rb + Rc
Ra + Rb + Rc
VDD
II.
Rb
Ra + Rb
VDD
Step 1. Output Voltage is equal to Pull-up Voltage.
Step 2. When Input Voltage (VSEN2) reaches the state of Vref
≥ VSEN2 (Rb+Rc)/(Ra+Rb+Rc)at Point A (Detected Voltage –VDET), the output of Compara-
tor is reversed, so that Output Voltage becomes GND. Discharging is performed from CD pin connected to External Capacitor. No delay time is
generated.
Step 3. Output Voltage becomes indefinite when Power Source Voltage (VDD) is smaller than Minimum Operating Voltage. When the output is pulled-
up,VDD is output.
Step 4. Output Voltage becomes equal to GND.
Step 5. When Input Voltage (VSEN2) reaches the state of Vref
≤VSEN2 Rb/(Ra + Rb) at Point B (Released Voltage +VDET), the output of Comparator is reversed, and
the External Capacitor is charged through CD pin,so that Output Voltage becomes equal to Pulled-up Voltage after a delay timeTD (= 0.69
× 106 × CD).
Step of Operation
The following descriptions deal with VDD pin and VSEN2 pin as connected each other, but Detector 2 can be detect-
ed the different voltage from VDD through VSEN2 pin.
RV5VE0
×××
Step
Step 1
Step 2
Step 3
Step 4
Step 5
Comparato (+) Pin
Input Voltage
III
II
I
Comparator Output
HL
L
H
Tr. 1
OFF
ON
OFF
Output Tr.
Nch
OFF
ON
Indefinite
ON
OFF
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