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参数资料
| 型号： | S-1131B55UC-N5O-TFG |
| 元件分类： | 固定正电压单路输出LDO稳压器 |
| 英文描述： | 5.5 V FIXED POSITIVE LDO REGULATOR, 0.28 V DROPOUT, PDSO5 |
| 封装： | LEAD FREE, SOT-89, 5 PIN |
| 文件页数： | 7/30页 |
| 文件大小： | 407K |
| 代理商： | S-1131B55UC-N5O-TFG |
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HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR
Rev.4.0_00
S-1131 Series
Seiko Instruments Inc.
15
Precautions
Wiring patterns for the VIN, VOUT and GND pins should be designed so that the impedance is low.
When mounting an output capacitor between the VOUT and VSS pins (CL) and a capacitor for stabilizing
the input between VIN and VSS pins (CIN), the distance from the capacitors to these pins should be as
short as possible.
Note that the output voltage may increase when a series regulator is used at low load current (1.0 mA or
less).
This IC performs phase compensation by using an internal phase compensator and the ESR of an
output capacitor. Therefore, always place a capacitor of 2.2
μF or more between VOUT and VSS pins.
A tantalum type capacitor is recommended. Moreover, to secure stable operation of the S-1131 Series,
it is necessary to employ a capacitor with an ESR within an optimum range (0.5 to 5
Ω). Using a
capacitor whose ESR is outside the optimum range (approximately 0.5 to 5
Ω), whether larger or
smaller, may cause an unstable output, resulting in oscillation. Perform sufficient evaluation under the
actual usage conditions for selection, including evaluation of temperature characteristics.
The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or an input capacitor is not connected.
The application conditions for the input voltage, output voltage, and load current should not exceed the
package power dissipation.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
In determining the output current, attention should be paid to the output current value specified in Table
6 in the electrical characteristics and footnote *5) of the table.
SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
相关PDF资料 |
PDF描述 |
|---|---|
| S-1131B50UC-N5J-TFG | 5 V FIXED POSITIVE LDO REGULATOR, 0.28 V DROPOUT, PDSO5 |
| S-1131B16UC-N4B-TFG | 1.6 V FIXED POSITIVE LDO REGULATOR, 0.95 V DROPOUT, PDSO5 |
| S-1131B25UC-N4K-TFG | 2.5 V FIXED POSITIVE LDO REGULATOR, 0.49 V DROPOUT, PDSO5 |
| S-1131B20UC-N4F-TFG | 2 V FIXED POSITIVE LDO REGULATOR, 0.6 V DROPOUT, PDSO5 |
| S-1131B48UC-N5H-TFG | 4.8 V FIXED POSITIVE LDO REGULATOR, 0.28 V DROPOUT, PDSO5 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S-1132 | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
| S-1132A23-I6T2U | 功能描述:IC REG LINEAR 300MA SNT6A 制造商:ablic u.s.a. inc. 系列:- 包装:剪切带（CT） 零件状态:在售 输出配置:正 输出类型:固定 稳压器数:1 电压 - 输入（最大值）:6.5V 电压 - 输出（最小值/固定）:2.3V 电压 - 输出（最大值）:- 压降（最大值）:0.23V @ 100mA 电流 - 输出:300mA 电流 - 静态（Iq):40μA PSRR:65dB（1kHz） 控制特性:使能 保护功能:过流 工作温度:-40°C ~ 85°C（TA） 安装类型:表面贴装 封装/外壳:6-SMD，扁平引线 供应商器件封装:SNT-6A（H） 标准包装:1 |
| S-1132A33-U5T1U | 功能描述:CMOS VOLTAGE REGULATOR 制造商:ablic u.s.a. inc. 系列:- 包装:剪切带（CT） 零件状态:在售 输出配置:正 输出类型:固定 稳压器数:1 电压 - 输入（最大值）:6.5V 电压 - 输出（最小值/固定）:3.3V 电压 - 输出（最大值）:- 压降（最大值）:0.15V @ 100mA 电流 - 输出:300mA 电流 - 静态（Iq):40μA PSRR:65dB（1kHz） 控制特性:使能 保护功能:过流 工作温度:-40°C ~ 85°C（TA） 安装类型:表面贴装 封装/外壳:SOT-89-5/6 供应商器件封装:SOT-89-5 标准包装:1 |
| S-1132B15-I6T2G | 功能描述:低压差稳压器 - LDO Linear LDO reg Hi 20uA Iq 300mA Iout RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| S-1132B15-I6T2U | 功能描述:IC REG LINEAR 300MA SNT6A 制造商:ablic u.s.a. inc. 系列:- 包装:剪切带（CT） 零件状态:在售 输出配置:正 输出类型:固定 稳压器数:1 电压 - 输入（最大值）:6.5V 电压 - 输出（最小值/固定）:1.5V 电压 - 输出（最大值）:- 压降（最大值）:0.58V @ 100mA 电流 - 输出:300mA 电流 - 静态（Iq):40μA PSRR:70dB（1kHz） 控制特性:使能 保护功能:过流 工作温度:-40°C ~ 85°C（TA） 安装类型:表面贴装 封装/外壳:6-SMD，扁平引线 供应商器件封装:SNT-6A（H） 标准包装:1 |
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