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参数资料
| 型号： | S-1323B31NB-N8Q-TFG |
| 元件分类： | 固定正电压单路输出LDO稳压器 |
| 英文描述： | 3.1 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4 |
| 封装： | LEAD FREE, SC-82AB, 4 PIN |
| 文件页数： | 5/28页 |
| 文件大小： | 322K |
| 代理商： | S-1323B31NB-N8Q-TFG |
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HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR
Rev.5.0_00
S-1323 Series
Seiko Instruments Inc.
13
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided
resistance of several hundreds k
Ω between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table 6
Logic Type
ON/OFF Pin
Internal Circuits
VOUT Pin Voltage
Current Consumption
A
“L”: Power on
Operating
Set value
ISS1
A
“H”: Power off
Stopped
VSS level
ISS2
B
“L”: Power off
Stopped
VSS level
ISS2
B
“H”: Power on
Operating
Set value
ISS1
VSS
ON/OFF
VIN
Figure 13
Selection of Output Capacitor (CL)
The S-1323 Series requires an output capacitor between the VOUT and VSS pins for phase compensation. A
ceramic capacitor with a capacitance of 1.0
μF or more can be used. Even if using an OS capacitor, tantalum
capacitor, or aluminum electrolytic capacitor, a capacitance of 1.0
μF or more and an ESR of 10 Ω or less are
required.
The value of the output overshoot or undershoot transient response varies depending on the value of the output
capacitor.
When selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature
characteristics, on the actual device.
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| S-1323B51PF-N9KTFGG | 5.1 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| S-1323B31PF-N8QTFG | 制造商:SII 制造商全称:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR |
| S-1323B32NB-N8RTFG | 功能描述:低压差稳压器 - LDO Linear LDO Reg Hi 70uA Iq 150mA Iout RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| S-1323B32PF-N8RTFG | 制造商:Seiko Instruments Inc (SII) 功能描述:LINEAR LDO REG HI 70UA IQ 150MA IOUT |
| S-1323B33NB-N8S-TF | 功能描述:低压差稳压器 - LDO 3.3 V 1% 70uV RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| S-1323B33NB-N8STFG | 功能描述:低压差稳压器 - LDO Linear LDO Reg Hi 70uA Iq 150mA Iout RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
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