参数资料
型号: S-13L42AF
元件分类: 微控制器/微处理器
英文描述: 4-BIT, MROM, 0.5 MHz, MICROCONTROLLER, PDSO22
封装: 1.27 MM PITCH, SOP-22
文件页数: 3/8页
文件大小: 98K
代理商: S-13L42AF
CMOS 4-bit 1-chip MICROCOMPUTER
S-1342AF/13L42AF
Seiko Instruments Inc.
3
n Block Diagram
S-1342/L42AF is connected by 4-bit data bus (DB), 12-bit address bus (AB), control signals, etc., and controls the
memories (ROM, RAM), registers, I/O ports, logic circuits (ALU), timers, etc.
One machine cycle (a cycle) consists of four system clocks.
Instruction cycles vary from one to six cycles, depending on the type of instruction.
n
n Absolute Maximum Ratings
n
n Recommended Operating Conditions
Item
Symbol
Conditions
Rating
Unit
Storage temperature
Tstg
-40 to +125
°C
Operating temperature
Topr
-10 to +70
°C
S-1342AF : -0.3 to +7.0
V
S-13L42AF : -0.3 to +4.0
V
Input voltage
VIN
Ta=25
°C
VSS-0.3 to VDD+0.3
V
Output voltage
VOUT
Ta=25
°C
VSS to VDD
V
Power dissipation
Pd
Ta=25
°C
300
mW
Item
Symbol
Conditions
Min.
Typ.
Max.
Unit
System clock: 500 kHz
for S-1342AF
1.8
6.0
V
System clock: 500 kHz
for S-13L42AF
1.2
3.6
V
Input voltage
VIN
0
VDD
V
System clock frequency
fsys
VDD=1.8 to 6.0 V (S-1342AF)
VDD=1.2 to 3.6 V (S-13L42AF)
200
500
KHz
Control signals
Reset
P20
P
23
P30
P
33
ROM
ALU
Program
counter
RMO
Key sense
port
Oscillation
control
Standby
control
CL2
CL1
RMO
buffer
Instruction
decoder
Interrupt
vector
table
Interrupt
control
Timer
P00
P
03
P10
P
13
Key scan
port
AB
DB
RAM
Registers
Watch dog
timer
System clock
generation circuit
Oscillation
control
VDD
VSS
RESET
Figure 2
Table 2
Ta=25
°C
Power supply voltage
VDD
Table 3
(Ta=-10
°C to +70°C)
Power supply voltage
VDD
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