参数资料
型号: S-7750C12XX-HCT1
元件分类: 微控制器/微处理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA16
封装: 1.93 X 2.07 MM, 0.6 MM HEIGHT, LEAD FREE, WLP-16
文件页数: 14/44页
文件大小: 563K
代理商: S-7750C12XX-HCT1
PROGRAMMABLE PORT CONTROLLER (PORT EXPANDER WITH BUILT-IN E2PROM CIRCUIT)
Rev.2.0_00
S-7750C
Seiko Instruments Inc.
21
5. Read operation
When the S-7750C receives the 7-bit device address and the Read / Write instruction code “1” after receiving a start
condition, it generates an acknowledgment signal.
Next, 8-bit data is output from the S-7750C synchronizing with the SCL clock.
After that, the master device sends a stop condition, not an acknowledgment signal in order to finish the Read
operation.
S
T
A
R
T
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE
C2 C1 C0
B7 B6 B5 B4 B3 B2 B1 B0
A
C
K
L
S
B
1
DATA
NO ACK from
Master Device
D
C
0
TA
/
C
D
C
1
D
C
2
Figure 25 Read
6. Write operation
6. 1 Write
When the S-7750C receives the 7-bit device address and the Read / Write instruction code “0” after receiving a start
condition, it generates an acknowledgment signal.
Next, after it receives the 8-bit word address and generates an acknowledgment signal, it receives a stop condition to
finish the Write command.
In the Write operation to the E
2PROM, the Write operation starts with a stop condition, the S-7750C finishes it after
the period to Write (max. 5 ms) has elapsed. During Write to the E
2PROM, all operations are inhibited to be performed
and the S-7750C does not send back any acknowledgment signals for command inputs.
C2 C1 C0
S
T
A
R
T
W
R
I
T
E
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE
A
C
K
L
S
B
0
S
T
O
P
DATA
A
C
K
B7 B6 B5 B4 B3 B2 B1 B0
D
C
0
D
C
1
D
C
2
TA
/
C
Remark
Users are not necessary to input data (8-bit) and the next acknowledgment for the reload command, the
switching access to register / E
2PROM command. If inputting data in this timing, data is regarded as
dummy, the next acknowledgement signal is generated.
Figure 26 Byte write
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