参数资料
型号: S-7760A42XX-TCT1G
元件分类: 微控制器/微处理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDSO16
封装: LEAD FREE, TSSOP-16
文件页数: 5/53页
文件大小: 860K
代理商: S-7760A42XX-TCT1G
PROGRAMMABLE PORT CONTROLLER (PORT EXPANDER WITH BUILT-IN E2PROM CIRCUIT)
Rev.1.3_00
S-7760A
Seiko Instruments Inc.
13
Command
1. Reload
This is a 1-byte command. Users can reload by inputting either of
W
/
R
in 0/1. When inputting this command, the
data corresponding to the E
2PROM is loaded to the register. After completing reload, (if the condition is satisfied), the
timer action starts. The reload command is not accepted during the timer action (from its start to the final invert of
output). Refer to “ Condition to Start Timer” regarding details.
2. Switching access to register/E
2PROM
This is a 1-byte command. The mode is in “register access mode” when this command is
W
/
R
= 0, “E
2PROM
access mode” when this command is
W
/
R
= 1. The register corresponding to the E
2PROM is the one to be
reloaded. In register access mode, only the register is rewritten, the E
2PROM maintains the prior data. In “E2PROM
access mode”, both data in the register and E
2PROM is rewritten.
3. Timer enable register
A timer enable register is a 4-bit register for Write only (it sends back FFh during Read). By setting each bit in the
register in “1”, an oscillation circuit starts, output from the lower 4ch ports (DO3 to 0) invert after the elapsed period
which is set by a timer setting register. This action is called “timer action”. This timer action starts at the point when
receiving TEN0 which is LSB in the register. The bit automatically goes back in “0” after writing “1” in the timer enable
register. Users cannot write in this register during the timer action (from the start to the final invert of output). This
register is not the one to be reloaded, thus it does not have the data which corresponds to the E
2PROM. The option is
available for the condition to start a timer; Condition AND with TIMEN = High, depending on the option. Refer to “
Condition to Start Timer
” regarding details.
B7
LSB
TEN 3
MSB
B6
B5
B4
B3
B2
B1
B0
TEN 2
TEN 1
TEN 0
W
Figure 14 Timer Enable Register
0 : Disable to invert output
1 : Enable to invert output
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