参数资料
型号: S-818A60AMC-BHO-T2
元件分类: 固定正电压单路输出LDO稳压器
英文描述: 6 V FIXED POSITIVE LDO REGULATOR, 0.2 V DROPOUT, PDSO5
封装: SOT-23, 5 PIN
文件页数: 5/31页
文件大小: 716K
代理商: S-818A60AMC-BHO-T2
LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.1.4_00
S-818 Series
Seiko Instruments Inc.
13
Precautions
Wiring patterns for the VIN pin, VOUT pin and GND pin should be designed so that the impedance is low.
When mounting an output capacitor (CL) or an input capacitor (CIN), the distance from the capacitor to the
VOUT pin and to the VSS pin should be as short as possible.
Note that output voltage may increase when a voltage regulator is used at low load current (Less than
10
A).
To prevent oscillation, the external components should be used under the following conditions:
Input capacitor (CIN):
0.47
F or more
Output capacitor (CL):
2
F or more
Equivalent series resistance (ESR): 10
or less
Input series resistance (RIN):
10
or less
The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or not connected.
The application condition for input voltage and load current should not exceed the package power
dissipation.
In determining output current, attention should be paid to the output current value specified and footnote *5
in Table 5 in the “ Electrical Characteristics”.
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
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