参数资料
型号: S-X14CBK
厂商: Johanson Dielectrics Inc
文件页数: 6/8页
文件大小: 0K
描述: 0603 X2Y CELL BUZZKILL FILT KIT
标准包装: 1
系列: X2Y®
套件类型: 旁路电容,去耦;陶瓷 MLCC
值: 700 件 - 1.0pF ~ 10nF,各 50 件
包装: 带装箱指南的塑料箱
安装类型: 表面贴装
包括封装: 0603(1608 公制)
产品目录页面: 2138 (CN2011-ZH PDF)
工具箱内容: (50) 709-1208-1-ND - CAP CER 470PF 100V 20% X7R 0603
(50) 709-1207-1-ND - CAP CER 2200PF 100V 20% X7R 0603
(50) 709-1206-1-ND - CAP CER 220PF 100V 20% X7R 0603
(50) 709-1205-1-ND - CAP CER 1500PF 100V X7R 0603
(50) 709-1204-1-ND - CAP CER 1000PF 100V X7R 0603
(50) 709-1203-1-ND - CAP CER 5.6PF 100V NP0 0603
(50) 709-1202-1-ND - CAP CER 47PF 100V 20% NP0 0603
(50) 709-1201-1-ND - CAP CER 33PF 100V 20% NP0 0603
(50) 709-1200-1-ND - CAP CER 22PF 100V 20% NP0 0603
(50) 709-1199-1-ND - CAP CER 1PF 100V NP0 0603
更多...
其它名称: 709-1197
S OLDER P AD R ECOMMENDATIONS
0402 (X07)
0603 (X14)
0805 (X15)
1206 (X18)
1210 (X41)
1410 (X44)
1812 (X43)
Z
IN
mm
IN
mm
IN
mm
IN
mm
IN
mm
IN
mm
IN
mm
V
X
0.020
0.51
0.035
0.89
0.050
1.27
0.065
1.65
0.100
2.54
0.100
2.54
0.125
3.18
Y
0.020
0.51
0.025
0.64
0.035
0.89
0.040
1.02
0.040
1.02
0.040
1.02
0.040
1.02
X
V
U
G
0.024
0.61
0.040
1.02
0.050
1.27
0.080
2.03
0.080
2.03
0.100
2.54
0.130
3.30
V
0.015
0.38
0.020
0.51
0.022
0.56
0.040
1.02
0.045
1.14
0.045
1.14
0.045
1.14
V
U
Z
0.039
0.064
0.99
1.63
0.060
0.090
1.52
2.29
0.080
0.120
2.03
3.05
0.120
0.160
3.05
4.06
0.160
0.160
4.06
4.06
0.160
0.180
4.06
4.57
0.190
0.210
4.83
5.33
Y
V
G
Use of solder mask beneath component is not recommended because of flux/contaminant entrapment.
O PTIMIZING X2Y P ERFORMANCE ON THE PCB
X2Y capacitors deliver excellent performance in EMI/RFI ?ltering and Power Bypass applications. Physical and electrical placement
on the PCB is critical in achieving good results. A low inductance, dual ground connection is mandatory.
EMI Filter Applications Low inductance PCB routing examples are shown in ?gures 1 and 2. Figures 3-5 show unbalanced and high
inductance connections and should be avoided. See detailed application note X2Y EMI FIlter Evaluation and PCB Design Guidelines .
Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
PDN / Power Bypass Applications Figures on right compare the X2Y
recommended layout against a poor layout. Because of its long extents from
device terminals to vias, and the wide via separation, the poor layout exhibits
approximately 200% L1 inductance, and 150% L2 inductance compared to
recommended X2Y layouts. See detailed application note X2Y Power Bypass
Mounting.
Recommended X2Y
Bypass Layout
L AB E VALUATION S OLDERING P RECAUTIONS
Ceramic capacitors (X2Y and standard MLC types) can be easily damaged when hand soldered. Thermal cracking of the ceramic
body is often invisible even under a microscope. Factors that increase thermal cracking risk:
1. 4 terminals to solder can increase hand-soldering time and temperature exposure
2. Pb-free solders have higher reflow temperatures
3. Low inductance connections to ground are inherently good heat-sinks
A damaged component may exhibit a short circuit immediately and not recover, or may operate with intermittent Insulation Resistance
(IR) levels. If you are not achieving expected results and have followed the other guidelines carefully, check to see you are adhering to
the soldering guidelines below:
? Always pre-heat the PCB and component to within 50°C of solder reflow temperature at 2°C/sec. maximum.
? Use contact-less hand solder tools such as a hot air pencil, IR lamp, etc.
? Avoid over-heating of the ceramic component, temperature limit: 260°C for 20-30 seconds max.
? Use a soldering iron as last resort; 20W max. tip, NO CONTACT with ceramic, limit solder time to 5 seconds max.
A reliable, cost effective prototype PCB reflow soldering process is possible using a household toaster oven. There are several good
procedures available on-line by googling “Toaster Oven Soldering”
6
www.johanson dielectrics.com
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